For those that don't understand...
This was created solely as an engineering exercise to deal with the feasibility of putting so many cores on one die. It is not a commercial product for any use whatsoever, and will not become one.
What this is more similar to than an '80 core processor' is really an '80 node network'. Instead of a conventional 'front side bus' link between the cores, about 1/4 of each 'core' is really a small networking switch. It links to its own core, to the (up to) four surrounding cores, and one going 'out' for connection to future stacked cores.
The big advantage over conventional multi-core systems is that on a conventional system, every circuit in the chip has to be designed to receive the clock signal simultaneously. The more transistors on the chip, the more you have to worry about clock propagation. On this design, you only need to worry about clock propagation within each core. That is the big advancement on this design, is the ability to have many many cores that don't need to worry about the clock signal. (Their estimate is that in current processors, up to 30% of the power is used solely to worry about the clock signal, in this new design, it's more like 5%.) This makes for a performance hit, but for such a massive energy savings, it's worth it. (Since now you can almost double the number of cores for the same power!)
This is also going to be more useful when we get to different cores on the same die. For example, you could separate out the integer unit from the floating point unit, from the vector unit, and have much simpler individual cores that are capable of faster individual performance on their tasks than a simple multi-big-core unit would. This means that we could see, say, 4 integer cores, 8 floating point cores, and 20 vector cores, for a monster 3D processor.
This was co-developed with their 'stacked dice' concept, where instead of having one huge die that contains everything, you just stack individual dice on top of each other. So you'd have your 32-core processor on one layer, and your cache on a second layer, maybe a similarly-designed GPU on a third layer, etc. Higher-end processors would have more stuff on more layers. Want double the cache? No need to completely redesign the processor, just add another cache layer! This makes manufacturing cheaper, because each layer could be made and tested separately. And if you over-fill each layer, you can even deal with individual cores being bad. (So on my 32-core example, you would have maybe 40 cores total, so that any 8 could be bad and you'd still have a fully functional 32-core processor.)
Basically, this is a complete shift in the design of processors, away from the 'processor connected to the northbridge' concept and toward a 'processors are a network of their own' concept. Just as originally, all components resided on the processor's bus, then we moved to a separate processor bus, now we're on INTERNAL busses.
