It could also be mesh, which could be easier to implement as they do not need a high-bandwidth switch for all SoCs.
My biggest question would be how do they incorporate the UMA programming model into this multi-SoC approach if it is really happening. Traditionally, programs need to be NUMA-aware to (use the best effort to) avoid data been accessed across NUMA domains because such operation is much slower than accessing data in its own NUMA-domain. This is still a problem in AMD's huge multi-die EPYC processors at least for some use case despite AMD's super-fast on-package fabric, and that's why EPYC processors can be configured to expose multiple NUMA domains instead of one.