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BostonQuad

macrumors regular
Original poster
Mar 9, 2015
172
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We've all seen this diagram:
1606143046821.png


But I haven't seen an explanation of what the "Fabric" is. It's the largest single chunk of real estate on the chip (unless you combine the DRAMs). It appears to be a gateway between the DRAM and all other components, but if that's all it is, why is it so big?

For that matter, what are the 3 unlabeled boxes between the CPU and Cache?

Furthermore, I used to think of cache as memory directly accessible by the CPU, resulting in it being faster than RAM out on the circuitboard. This diagram shows that's mistaken, as both Cache and DRAM are roughly equally far from the CPU, with Fabric being an intermediary for both.

Can anyone enlighten me as to these areas?
 
My best understanding is diagram like this are used to show the route, the flow but not necessarily the actual chip. I believe the actual chip is like this
F0FF0EDD-E956-4CA7-8916-D2319ED285FF.jpeg

The CPU is there. The GPU is upper right, close to the CPU. The neural engine is under the CPU and the Secure Enclave is under the GPU so they are all close together with no “fabric” in the middle.
 
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I don’t know about the fabric features but the CPU doesn’t look like those diagrams(both of them) at all.
Here is what it looks like inside/outside:
A6C16A6B-12B1-4267-9047-AB16B7F9537E.jpeg
04FA6DF4-F559-4B47-ABF1-C7F0BB2882B1.jpeg
 
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Thanks; I was over-interpreting that diagram. Am I also over-interpreting it to expect those 3 unlabeled boxes represent something in particular?
 

I imagine similar to AMD’s Infinity Fabric.

Just intra-die communication.
 
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"Fabric" is just the term they're using for all the things that connect things together. In Intel systems, it would be called the "chipset", and be a physically separate chip.

Who knows what the three unlabeled boxes are - maybe they were going to highlight WiFi, USB4, and storage controller or something, then decided against highlighting them, but left the boxes in place?
 
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Exactly, Fabric is the communication logic that connects all the components abs also ha does memory I/O. Cache - each of the components have their own cache, but they also share a large common cache. This common cache is one of the reasons why communication between different processors is do efficient on Apple Silicon. In the M1, it replaces the L3 cache.
 
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