I have a very strange situation. I just upgraded my cMP 1,1 from dual Xeon 5150s to dual Xeon 5355s. The upgrade went smoothly enough, but somehow, I have lost 2 CPU cores out of the possible 8 I should now have.
I updated the SMC and firmware to 2,1 before the upgrade. And now, when I check System Profile, I get the correct listing for the CPU (Quad Core Intel Xeon), but the Total Number of Cores is listed as 6 and the L2 Cache (per Processor) is listed as 6MB, which is 3/4 of the true amount.
Has anyone ever seen this before? I didn't seen any reference to this in the forums and can't find anything about it with my poor Google-fu.
Screencap from System Profile and listing from MachDep.cpu below. I appreciate any help or ideas anybody can toss my way. Surely these aren't CPUs with disabled cores???
sysctl -a |grep machdep.cpu
machdep.cpu.max_basic: 10
machdep.cpu.max_ext: 2147483656
machdep.cpu.vendor: GenuineIntel
machdep.cpu.brand_string: Intel(R) Xeon(R) CPU X5355 @ 2.66GHz
machdep.cpu.family: 6
machdep.cpu.model: 15
machdep.cpu.extmodel: 0
machdep.cpu.extfamily: 0
machdep.cpu.stepping: 7
machdep.cpu.feature_bits: 3219913727 320445
machdep.cpu.extfeature_bits: 537921536 1
machdep.cpu.signature: 1783
machdep.cpu.brand: 0
machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 DTES64 MON DSCPL VMX EST TM2 SSSE3 CX16 TPR PDCM
machdep.cpu.extfeatures: SYSCALL XD EM64T LAHF
machdep.cpu.logical_per_package: 4
machdep.cpu.cores_per_package: 4
machdep.cpu.microcode_version: 102
machdep.cpu.processor_flag: 2
machdep.cpu.mwait.linesize_min: 64
machdep.cpu.mwait.linesize_max: 64
machdep.cpu.mwait.extensions: 3
machdep.cpu.mwait.sub_Cstates: 32
machdep.cpu.thermal.sensor: 1
machdep.cpu.thermal.dynamic_acceleration: 0
machdep.cpu.thermal.invariant_APIC_timer: 0
machdep.cpu.thermal.thresholds: 2
machdep.cpu.thermal.ACNT_MCNT: 1
machdep.cpu.thermal.core_power_limits: 0
machdep.cpu.thermal.fine_grain_clock_mod: 0
machdep.cpu.thermal.package_thermal_intr: 0
machdep.cpu.thermal.hardware_feedback: 0
machdep.cpu.thermal.energy_policy: 0
machdep.cpu.arch_perf.version: 2
machdep.cpu.arch_perf.number: 2
machdep.cpu.arch_perf.width: 40
machdep.cpu.arch_perf.events_number: 7
machdep.cpu.arch_perf.events: 0
machdep.cpu.arch_perf.fixed_number: 0
machdep.cpu.arch_perf.fixed_width: 0
machdep.cpu.cache.linesize: 64
machdep.cpu.cache.L2_associativity: 16
machdep.cpu.cache.size: 4096
machdep.cpu.tlb.inst.small: 128
machdep.cpu.tlb.inst.large: 8
machdep.cpu.tlb.data.small: 16
machdep.cpu.tlb.data.small_level1: 256
machdep.cpu.tlb.data.large: 16
machdep.cpu.tlb.data.large_level1: 32
machdep.cpu.address_bits.physical: 36
machdep.cpu.address_bits.virtual: 48
machdep.cpu.core_count: 4
machdep.cpu.thread_count: 4
I updated the SMC and firmware to 2,1 before the upgrade. And now, when I check System Profile, I get the correct listing for the CPU (Quad Core Intel Xeon), but the Total Number of Cores is listed as 6 and the L2 Cache (per Processor) is listed as 6MB, which is 3/4 of the true amount.
Has anyone ever seen this before? I didn't seen any reference to this in the forums and can't find anything about it with my poor Google-fu.
Screencap from System Profile and listing from MachDep.cpu below. I appreciate any help or ideas anybody can toss my way. Surely these aren't CPUs with disabled cores???
sysctl -a |grep machdep.cpu
machdep.cpu.max_basic: 10
machdep.cpu.max_ext: 2147483656
machdep.cpu.vendor: GenuineIntel
machdep.cpu.brand_string: Intel(R) Xeon(R) CPU X5355 @ 2.66GHz
machdep.cpu.family: 6
machdep.cpu.model: 15
machdep.cpu.extmodel: 0
machdep.cpu.extfamily: 0
machdep.cpu.stepping: 7
machdep.cpu.feature_bits: 3219913727 320445
machdep.cpu.extfeature_bits: 537921536 1
machdep.cpu.signature: 1783
machdep.cpu.brand: 0
machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 DTES64 MON DSCPL VMX EST TM2 SSSE3 CX16 TPR PDCM
machdep.cpu.extfeatures: SYSCALL XD EM64T LAHF
machdep.cpu.logical_per_package: 4
machdep.cpu.cores_per_package: 4
machdep.cpu.microcode_version: 102
machdep.cpu.processor_flag: 2
machdep.cpu.mwait.linesize_min: 64
machdep.cpu.mwait.linesize_max: 64
machdep.cpu.mwait.extensions: 3
machdep.cpu.mwait.sub_Cstates: 32
machdep.cpu.thermal.sensor: 1
machdep.cpu.thermal.dynamic_acceleration: 0
machdep.cpu.thermal.invariant_APIC_timer: 0
machdep.cpu.thermal.thresholds: 2
machdep.cpu.thermal.ACNT_MCNT: 1
machdep.cpu.thermal.core_power_limits: 0
machdep.cpu.thermal.fine_grain_clock_mod: 0
machdep.cpu.thermal.package_thermal_intr: 0
machdep.cpu.thermal.hardware_feedback: 0
machdep.cpu.thermal.energy_policy: 0
machdep.cpu.arch_perf.version: 2
machdep.cpu.arch_perf.number: 2
machdep.cpu.arch_perf.width: 40
machdep.cpu.arch_perf.events_number: 7
machdep.cpu.arch_perf.events: 0
machdep.cpu.arch_perf.fixed_number: 0
machdep.cpu.arch_perf.fixed_width: 0
machdep.cpu.cache.linesize: 64
machdep.cpu.cache.L2_associativity: 16
machdep.cpu.cache.size: 4096
machdep.cpu.tlb.inst.small: 128
machdep.cpu.tlb.inst.large: 8
machdep.cpu.tlb.data.small: 16
machdep.cpu.tlb.data.small_level1: 256
machdep.cpu.tlb.data.large: 16
machdep.cpu.tlb.data.large_level1: 32
machdep.cpu.address_bits.physical: 36
machdep.cpu.address_bits.virtual: 48
machdep.cpu.core_count: 4
machdep.cpu.thread_count: 4