M2 single thread performance?

[joptimus]

I hope that ST performance will increase 10-15% additional to MT speed. Most apps/games would probably not use 8 performance cores fully, so the baseline performance level should rise, too.
My guess is 5-10 % IPC uplift and 5% frequency.

What about you?

 

[jdb8167]

I hope that ST performance will increase 10-15% additional to MT speed. Most apps/games would probably not use 8 performance cores fully, so the baseline performance level should rise, too.
My guess is 5-10 % IPC uplift and 5% frequency.

What about you?

It depends on if it is a new architecture. If the next Apple Silicon SoC is more CPU & GPU cores with an upgrade to the memory controller to allow more bandwidth (and hopefully more than 16 GB) then the ST performance might not change much. On the other hand if the CPU cores are 2nd generation then a 15-20 % increase seems possible.

 

[UBS28]

Just wait till the iPhone 13 is released. That should give an indication of the performance gains of the M2.

 

[andrewstirling]

Think we’re thinking M2 might come along before then. Probably in larger iMacs and MacBook Pros

 

[leman]

I’d expect M2 to be a larger deviation from A15 than the more conservative M1. Somewhere around 10% higher IPC and 10-15% higher clock.

 

[Gudi]

It is actually not important for Apple to follow up M1 with M2 in just one year. What they need is an M1X (which might be called M2) for large-screen Macs to complete the transition to Apple Silicone. Maybe they can pull off both with one chip, more cores and higher single-core performance?

 

[andrewstirling]

They need to solve the ram problem for higher end machines.

 

[jdb8167]

They need to solve the ram problem for higher end machines.

Bandwidth or GBs? They really need to solve both but I suspect the bandwidth problem is harder.

 

[leman]

It is actually not important for Apple to follow up M1 with M2 in just one year. What they need is an M1X (which might be called M2) for large-screen Macs to complete the transition to Apple Silicone. Maybe they can pull off both with one chip, more cores and higher single-core performance?

Well, there are two possibilities: either Apple releases a larger chip based on A14 microarchitecture (I suppose that's what you mean with M1X), or they will base their prosumer chips on the followup microarchitecture. As Apple usually releases a new microarchitecture every year, I'd say that the chances to see an A14-based product are fairly slim. nd besides, M1 was a rather conservative chip, a fairly straightforward adaptation of their mobile architecture, with only minimal changes to make it viable for desktop use. For their prosumer line, it probably would make more sense to use the next-gen chip which will probably be more geared towards desktop than A14 was.

 

[leman]

They need to solve the ram problem for higher end machines.

What RAM problem?

 

[andrewstirling]

What RAM problem?

I was referring the the 16gb cap. I wasn’t aware there was also a bandwidth issue

 

[darngooddesign]

I hope that ST performance will increase 10-15% additional to MT speed. Most apps/games would probably not use 8 performance cores fully, so the baseline performance level should rise, too.
My guess is 5-10 % IPC uplift and 5% frequency.

What about you?

To quote KMFDM, it will be More & Faster.

 

[darngooddesign]

...and hopefully more than 16 GB

More RAM goes without saying because who in their right mind would buy a MacPro or iMacPro limited to 16GB.

 

[leman]

I was referring the the 16gb cap. I wasn’t aware there was also a bandwidth issue

These are design points, not issues. M1 carefully balances multiple factors, such as the amount of heterogeneous processing units, cache size, memory bandwidth, energy consumption, package consumption and manufacturing cost. Both the memory bandwidth and the memory capacity are adequate for the intended market segment. Future prosumer chips will obviously need to meet different design points.

 

[NotTooLate]

I was referring the the 16gb cap. I wasn’t aware there was also a bandwidth issue

what bandwidth issue ? it has 68GB/s which is a very good number , better then the ryzen and intel of the world where they run dual channel DDR4 memories (desktop and laptop variants , the threadrippers have more memory channels) , you can argue that this BW is shared with the GPU (and you will be right) for the M1 , but if you run an intensive CPU application it will be a great performer , note that Anandtech points out that a single firestorm core can saturate around 50GB/s alone ! which is crazy throughput for a single core.

TLDR - there is no BW issue , M1 has best in class BW , in regards to capacity , if Apple sticks to LPDDR they will have a hard time reaching the big numbers of the DDR variants.

 

[jdb8167]

what bandwidth issue ? it has 68GB/s which is a very good number , better then the ryzen and intel of the world where they run dual channel DDR4 memories (desktop and laptop variants , the threadrippers have more memory channels) , you can argue that this BW is shared with the GPU (and you will be right) for the M1 , but if you run an intensive CPU application it will be a great performer , note that Anandtech points out that a single firestorm core can saturate around 50GB/s alone ! which is crazy throughput for a single core.

TLDR - there is no BW issue , M1 has best in class BW , in regards to capacity , if Apple sticks to LPDDR they will have a hard time reaching the big numbers of the DDR variants.

There is no bandwidth issue for the current M1. As you say, it gets 68 GB/s which is very good for a mobile platform.

But we are talking about an upgrade to the M1. One reason the M1 feels so high performance is that Apple designed in the RAM bandwidth to match their high performance CPU & GPU cores. The reality is that a single Firestorm core can nearly saturate the RAM bus by itself. Add 4 or 8 more CPU cores and who knows how many GPU cores and the follow on to the M1 will no longer have enough bandwidth to keep the cores fed.

Apple is going to have to come up with a solution to this dilemma. It isn’t going to be easy. It will probably entail using DDR5/LPDDR5 with a very wide bus. That is going to be expensive. It is going to be interesting to see what Apple does to the design.

 

[cmaier]

There is no bandwidth issue for the current M1. As you say, it gets 68 GB/s which is very good for a mobile platform.

But we are talking about an upgrade to the M1. One reason the M1 feels so high performance is that Apple designed in the RAM bandwidth to match their high performance CPU & GPU cores. The reality is that a single Firestorm core can nearly saturate the RAM bus by itself. Add 4 or 8 more CPU cores and who knows how many GPU cores and the follow on to the M1 will no longer have enough bandwidth to keep the cores fed.

Apple is going to have to come up with a solution to this dilemma. It isn’t going to be easy. It will probably entail using DDR5/LPDDR5 with a very wide bus. That is going to be expensive. It is going to be interesting to see what Apple does to the design.

Big caches go a long way to eliminate memory bandwidth bottlenecks. Don’t have to worry about DDR5 when 85% of your memory accesses are to static RAMs with custom buses.

 

[jdb8167]

Big caches go a long way to eliminate memory bandwidth bottlenecks. Don’t have to worry about DDR5 when 85% of your memory accesses are to static RAMs with custom buses.

What about GPU though? I doubt caches help as much there.

 

[leman]

What about GPU though? I doubt caches help as much there.

They do, tremendously. Much of GPU performance improvements revolves around spacial locality of memory access (for example, two neighboring points in a 3D scene are likely to access neighboring points in a texture). This is also why AMD is doing so well with their Infinity Cache technology, and why Nvidia and AMD are using tiling on their current desktop GPUs. And of course, Apple's TBDR GPUs excel at utilizing spatial locality.

 

[jdb8167]

They do, tremendously. Much of GPU performance improvements revolves around spacial locality of memory access (for example, two neighboring points in a 3D scene are likely to access neighboring points in a texture). This is also why AMD is doing so well with their Infinity Cache technology, and why Nvidia and AMD are using tiling on their current desktop GPUs. And of course, Apple's TBDR GPUs excel at utilizing spatial locality.

Are you suggesting that the current M1 SoC memory bandwidth will be sufficient for a future M1 follow on?

 

[leman]

Are you suggesting that the current M1 SoC memory bandwidth will be sufficient for a future M1 follow on?

Absolutely not! What I am suggesting though is that Apple GPUs need less memory bandwidth to reach certain performance levels compared to some other designs. One big issue however is GPU compute, not many magic tricks help here…

 

[cmaier]

Are you suggesting that the current M1 SoC memory bandwidth will be sufficient for a future M1 follow on?

it depends on where you are measuring the bandwidth. At the DRAM I/O? Or at the CPU/GPU-memory system interface?

With a big enough cache, the DRAM I/O bandwidth probably doesn’t need to change very much, if at all. But, of course, that big cache would be vastly increasing the bandwidth between the CPU/GPU and the memory system.

 

[cmaier]

What about GPU though? I doubt caches help as much there.

GPU tends to benefit even more than CPU. When doing graphics, as pointed out, there is high spatial locality. And when performing GPU compute functions, the memory accesses tend to be sequential, which benefits mightily from caching.