Claim - New 12 CPU Core M1 SoC for iMac Pro

[leman]

Not disagreeing with anything you wrote - I also find this 12 core part rumor odd, but one slightly interesting thing to note about frequency: remember we had the discussion about why the frequency of the P-core was only allowed to max out if one core was active? I believe @cmaier explained it as probable that it was due to the closeness of the P-cores to each other and the effect that had on power and heat. Unsurprisingly he was probably right as according to Anandtech the frequency behavior of the Pro/Max is different:

“The CPU cores clock up to 3228MHz peak, however vary in frequency depending on how many cores are active within a cluster, clocking down to 3132 at 2, and 3036 MHz at 3 and 4 cores active. I say “per cluster”, because the 8 performance cores in the M1 Pro and M1 Max are indeed consisting of two 4-core clusters, both with their own 12MB L2 caches, and each being able to clock their CPUs independently from each other, so it’s actually possible to have four active cores in one cluster at 3036MHz and one active core in the other cluster running at 3.23GHz.”

I know you probably saw that too but in the context of your discussion I just that was a really interesting point as that is *very* different from anyone else’s frequency design that I know of.

From my amateur viewpoint it almost looks like Apple "took a step back" here and made the cores within a P-cluster codependent. Modern CPU cores usually can have independently controlled clock etc. But it seems that the cores in a P-cluster share a lot of things: frequency, L2 cache, memory channels... could this be another of the many "tricks" how Apple can deliver efficient hardware, by simplifying the circuitry around these things?

 

[crazy dave]

From my amateur viewpoint it almost looks like Apple "took a step back" here and made the cores within a P-cluster codependent. Modern CPU cores usually can have independently controlled clock etc. But it seems that the cores in a P-cluster share a lot of things: frequency, L2 cache, memory channels... could this be another of the many "tricks" how Apple can deliver efficient hardware, by simplifying the circuitry around these things?

Interesting I hadn’t thought about it that way. Though honestly some of the confusing and overlapping “turbo modes” that Intel has created also effectively make the clocks codependent - you know the ones where it can boost to 5.2 GHz on the most favored core but only on a Tuesday when another core is half filled with work?

 

[cmaier]

From my amateur viewpoint it almost looks like Apple "took a step back" here and made the cores within a P-cluster codependent. Modern CPU cores usually can have independently controlled clock etc. But it seems that the cores in a P-cluster share a lot of things: frequency, L2 cache, memory channels... could this be another of the many "tricks" how Apple can deliver efficient hardware, by simplifying the circuitry around these things?

I don’t think the issue is inability to independently clock them - I’m sure they all have their own PLLs, which is where most of the complication would be. I’m pretty sure the issue is due to physical effects (most likely local heating, but possibly something else).

 

[leman]

Interesting I hadn’t thought about it that way. Though honestly some of the confusing and overlapping “turbo modes” that Intel has created also effectively make the clocks codependent - you know the ones where it can boost to 5.2 GHz on the most favored core but only on a Tuesday when another core is half filled with work?

Ah, yeah, the infamous Velocity Boost... I'm sure the exec who came up with that crap got a big bonus...

I don’t think the issue is inability to independently clock them - I’m sure they all have their own PLLs, which is where most of the complication would be. I’m pretty sure the issue is due to physical effects (most likely local heating, but possibly something else).

Would there be a problem with the L2 cache if CPU cores were clocked independently? I might be completely mistaken, but doesn't it seem like all cores in the same cluster run the same clock (just that they can also be turned off individually).

 

[cmaier]

Ah, yeah, the infamous Velocity Boost... I'm sure the exec who came up with that crap got a big bonus...




Would there be a problem with the L2 cache if CPU cores were clocked independently? I might be completely mistaken, but doesn't it seem like all cores in the same cluster run the same clock (just that they can also be turned off individually).

I’m not sure if they all run at the same clock or not, but that wouldn’t be a necessity for L2 accesses. The cache likely does not vary clock based on the CPU clocks. Usually you have something like a FIFO on the bus to handle the disparity between clocks.

 

[CWallace]

Fair enough, but does it make sense in the context of M1 designs? This would be a radical departure and more suggestive of a multi-chip-solution (where each chip/tile consist of 4P+2E cores).

(And) if they do this kind of fundamental redesign why even stick with Firestorm? Would it still be M1?

One imagines this new SoC was designed either in parallel with M1 Pro/Max or shortly thereafter and as such it would be that familiarity with the M1 reference designs that would push them to sticking with M1 rather than trying this with M2.

Plus this machine is still believed to be coming in either 1Q or 2Q 2022 and the baseline M2 Macs are still not expected until Q4.

 

[casperes1996]

@cmaier - One thing is the technical feasibility of a 12-core design here, but does it make any sense in terms of production scale and cost? Presently, we have three dies, M1, M1 Pro and M1 Max. The rumour of combined M1 Maxes for Mac Pro and potentially iMac Pro makes sense to me since it scales without requiring a brand new die specific to low volume devices.
AFAIK Intel also still makes all their many many chip configurations from three dies. LCC, HCC and XCC (low, high, eXtreme core count). Though that may be different these days - Alder Lake has some funky configs and whatnot.
I am under the impression it's similar for AMD though they of course have their core complexes to work with for their tiles, but yeah, not a lot of unique die layouts, just different ways of combining/disabling chunks.
I feel like creating a 12 core M1 Max+ whatever as a unique 10+2 configuration or something just for iMac Pro and maybe even Mac Pro and Mac mini at a push, it's low volume and I can't imagine the production being that feasible compared to the other rumoured ideas. M1 Max Duo at the top end for iMac Pro. Maybe a 12-core could be a very cut down M1 Max Duo, where it's 6P+0E, but I don't imagine there's a high defect rate on the E cores considering their dimensions.
Thoughts?

 

[cmaier]

@cmaier - One thing is the technical feasibility of a 12-core design here, but does it make any sense in terms of production scale and cost? Presently, we have three dies, M1, M1 Pro and M1 Max. The rumour of combined M1 Maxes for Mac Pro and potentially iMac Pro makes sense to me since it scales without requiring a brand new die specific to low volume devices.
AFAIK Intel also still makes all their many many chip configurations from three dies. LCC, HCC and XCC (low, high, eXtreme core count). Though that may be different these days - Alder Lake has some funky configs and whatnot.
I am under the impression it's similar for AMD though they of course have their core complexes to work with for their tiles, but yeah, not a lot of unique die layouts, just different ways of combining/disabling chunks.
I feel like creating a 12 core M1 Max+ whatever as a unique 10+2 configuration or something just for iMac Pro and maybe even Mac Pro and Mac mini at a push, it's low volume and I can't imagine the production being that feasible compared to the other rumoured ideas. M1 Max Duo at the top end for iMac Pro. Maybe a 12-core could be a very cut down M1 Max Duo, where it's 6P+0E, but I don't imagine there's a high defect rate on the E cores considering their dimensions.
Thoughts?

Most of the cost will simply be the incremental cost of the wafer starts. The fixed engineering costs are generally dwarfed by the manufacturing costs, particularly here where it’s an SoC using mostly the same blocks as numerous other SoC’s where the design work has already been done. So Apple mostly would be concerned by the cost it pays for each wafer start. You then factor in the yield - bigger die (presumably) means a little less yield. That takes into account both that you have fewer die that fit on a wafer, and fewer of those that work. That gives you your per-die cost. Then you take into account whether you can use any of the die that fail in other products (e.g. with cores disable). Blah blah blah.

People overestimate the cost of a variation. TMSC doesn’t suddenly charge them extra because they are handed something new to make (beyond the mask preparation costs, which are also rather small compared to the incremental costs).

 

[CWallace]

Max Tech weighs in with three possibe scenarios:

1. It is a new M1 SoC. He dislikes this because it would be very expensive for Apple to produce.
2. It is a deeply-binned "M1 Max Duo / Jade2C-Die". He dislikes this because it would require somewhat unique failure modes in terms of P and E cores.
3. This is actually an M2 Pro SoC which would have 12P/2E cores instead of the 8P/2E of the M1 Pro SoC. He feels that if this is the case, it would be exclusive to the iMac Pro arriving in Q4 2022 (or later) alongside the Apple Silicon Mac Pro and that what is coming by WWDC is the 27" iMac 5K replacement with M1 Pro/Max.

As for Option 2, I could see this being the "M2 Max Duo" with functional cores intentionally disabled to get down to 12 cores (10P and 2E) for the "consumer/prosumer" iMac 5K. And then Apple would offer an iMac Pro with 14-20 cores.

As for Option 3, it is plausible if Apple decides to bi-furcate the iMac line again like they did in 2017 with a consumer/prosumer iMac 4.5K / iMac 5K and then a professional iMac 5K/6K announced six or more months later.

 

[Boil]

Drop the E cores, have three 4-core P clusters, swap LPDDR5 for LPDDR5X, add eight more GPU cores, for 40 total per die; I give you the M1 Ultra...!

M1 Ultra

• 12-core CPU (all Performance cores)
• 40-core GPU
• 16-core Neural Engine
• 256GB LPDDR5X RAM
• 500GB/s UMA bandwidth

Dual M1 Ultra

• 24-core CPU (all Performance cores)
• 80-core GPU
• 32-core Neural Engine
• 512GB LPDDR5X RAM
• 1TB/s UMA bandwidth

Quad M1 Ultra

• 48-core CPU (all Performance cores)
• 160-core GPU
• 64-core Neural Engine
• 1TB LPDDR5X RAM
• 2TB/s UMA bandwidth

 

[CWallace]

Drop the E cores, have three 4-core P clusters, swap LPDDR5 for LPDDR5X, add eight more GPU cores, for 40 total per die; I give you the M1 Ultra...!

Except that runs contrary to what we have heard about the "M1 Max Duo" (Jade2C-Die) and "M1 Max Quad" (Jade4C-Die) which are widely presumed to be two or four Max interconnected with 20 or 40 total CPU cores (80% Performance and 20% Efficiency).

After watching Max Tech's video, I am very much warming to the idea this is an "M1 Max Duo" configured as follows:

• A 12-core (10P/2E) model for the "consumer/prosumer" iMac 5K (plus M1 Pro / M1 Max as option)
• A 14-20 core model for the "professional" iMac 5K Pro

 

[casperes1996]

Most of the cost will simply be the incremental cost of the wafer starts. The fixed engineering costs are generally dwarfed by the manufacturing costs, particularly here where it’s an SoC using mostly the same blocks as numerous other SoC’s where the design work has already been done. So Apple mostly would be concerned by the cost it pays for each wafer start. You then factor in the yield - bigger die (presumably) means a little less yield. That takes into account both that you have fewer die that fit on a wafer, and fewer of those that work. That gives you your per-die cost. Then you take into account whether you can use any of the die that fail in other products (e.g. with cores disable). Blah blah blah.

People overestimate the cost of a variation. TMSC doesn’t suddenly charge them extra because they are handed something new to make (beyond the mask preparation costs, which are also rather small compared to the incremental costs).

I see. Thanks for the info. I had no clue about the production costs, but just assumed it to be a hurdle based on Intel for so long having just those three LCC, HCC, XCC configs and bins of them, economy of scale and whatnot

 

[Boil]

Except that runs contrary to what we have heard about the "M1 Max Duo" (Jade2C-Die) and "M1 Max Quad" (Jade4C-Die) which are widely presumed to be two or four Max interconnected with 20 or 40 total CPU cores (75% Performance and 25% Efficiency).

After watching Max Tech's video, I am very much warming to the idea this is an "M1 Max Duo" configured as follows:

• A 12-core (10P/2E) model for the "consumer/prosumer" iMac 5K (plus M1 Pro / M1 Max as option)
• A 14-20 core model for the "professional" iMac 5K Pro

It would actually be 80% performance & 20% efficiency...

 

[cmaier]

I see. Thanks for the info. I had no clue about the production costs, but just assumed it to be a hurdle based on Intel for so long having just those three LCC, HCC, XCC configs and bins of them, economy of scale and whatnot

Intel has different market dynamics to contend with - it sells CPUs, not finished products. It can’t costs of the chip in the 35% profit margin of the finished computer. It also has customers who are trying to compete in a much wider variety of market segments than Apple.

 

[casperes1996]

Intel has different market dynamics to contend with - it sells CPUs, not finished products. It can’t costs of the chip in the 35% profit margin of the finished computer. It also has customers who are trying to compete in a much wider variety of market segments than Apple.

Very true. But again, looking from that more as an outsider of the chip industry I would think that could give them more flexibility in terms of economy of scale than Apple just producing chips for themselves. On the flip side, Apple can tap into TSMC's economy of scale rather than needing to efficiently occupy a whole fab of their own

 

[SpotOnT]

Edit: Deleted

 

[casperes1996]

Ya that is my thought. Or maybe the designed the chip with 12 cores, to allow for 2 duds, and production yields are good enough they can sell some 12 core models.

As cmaier pointed out early in this thread; Nope. Look at a die shot of M1 Pro/Max. You can count the cores. There's "just" 10 of them

 

[SpotOnT]

As cmaier pointed out early in this thread; Nope. Look at a die shot of M1 Pro/Max. You can count the cores. There's "just" 10 of them

Ya my bad. I responded to a comment before reading the comments below it. I agree the Max is not a binned chip.

PS. I also tried to delete my comment before seeing your reply ? Didn’t want to clutter up the thread is all - but is all good.

 

[JMacHack]

I’m gonna throw out the very real possibility this rumor is hogwash. I’m of the belief that the simplest answer is that the upcoming “iMac Pro” will use the same M1 Pro/Max configuration as the MacBook Pro lineup does.

It just makes the most sense, these are Apple’s “Pro” dies, they don’t have to make an oddball chip for one or two products, and it neatly lines up with their existing products.

Besides, how much more performant can two more cpu cores be over the current M1 Max’s 10?

 

[crazy dave]

Does anyone have a bead on the code snippet that refers to a 12 core iMac?

 

[CWallace]

Does anyone have a bead on the code snippet that refers to a 12 core iMac?

Sounds like something that would be in a an xCode or macOS beta since we have seen leaks/claims like the Mac Pro with Ice Lake SP Xeons or newer-generation AMD GPUs were datamined.

 

[Boil]

Sounds like something that would be in a an xCode beta since that is where leaks/claims like the Mac Pro with Ice Lake SP Xeons or the 6000 series AMD GPUs were datamined.

Do you mean 7000-series AMD GPUs, because the 6000-series have been available for the 2019 Mac Pro for awhile now...?

 

[cmaier]

I’m gonna throw out the very real possibility this rumor is hogwash. I’m of the belief that the simplest answer is that the upcoming “iMac Pro” will use the same M1 Pro/Max configuration as the MacBook Pro lineup does.

It just makes the most sense, these are Apple’s “Pro” dies, they don’t have to make an oddball chip for one or two products, and it neatly lines up with their existing products.

Besides, how much more performant can two more cpu cores be over the current M1 Max’s 10?

Depends. Are all 12 P-cores? Does a desktop benefit much from E-cores? I dunno.

 

[crazy dave]

Sounds like something that would be in a an xCode beta since that is where leaks/claims like the Mac Pro with Ice Lake SP Xeons or the 6000 series AMD GPUs were datamined.

Aye I’m just wondering if there’s more information there. Because the only confirmed part of his statement is the higher end configuration. The 12 cores was from this code snippet and I didn’t get the sense that this particular configuration was confirmed. It would also be nice to see the context of in which the 12 core iMac was referred to try to see if anything else can be gleaned about the nature of the 12 cores.

 

[CWallace]

Do you mean 7000-series AMD GPUs, because the 6000-series have been available for the 2019 Mac Pro for awhile now...?

Both, frankly (the 6000 family was first leaked in Spring 2021 via GeekBench and the 7000 family first leaked via drivers in macOS 10.8.3).