Graphical bugs in steam games on rx560

[skizzo]

THANKS!!!!

Almost fit my guess. The graphic card CAN negotiate at PCIe 2.0 speed automatically in slot 3. However, I didn't expect it will further limit the link width to x2.

Anyway, million thanks for your help.

Now we know the PCIe 1.1 limitation is NOT the graphic card's hardware limitation.

So I am no expert here but I am surprised that you would be surprised that it was limited to a link width of x2 in slot #3, based off that slot #1 is x16 and slot #3 is x4

In my head, this just seems like a basic math ratio equation. Please correct me if I have missed something or just do not have the proper understanding. Perhaps this is a different situation because that GPU is only x8 instead of x16 ? Or perhaps it is normal for say a PCIe 3.0 GPU to run at PCIe 2.0 when installed in a PCIe 2.0 slot, but it should maintain its full lane width? (which would make this particular scenario unique and would therefore explain why you did not expect this behavior?)

For example:
8/16 = x/4

8(4) = 16x

32 = 16x

32/16 = x

x = 2

I am just trying to learn more myself and wrap my head around understanding it. Please don't take it like I am trying to contradict or challenge anyone who clearly has more knowledge on the subject

 

[h9826790]

So I am no expert here but I am surprised that you would be surprised that it was limited to a link width of x2 in slot #3, based off that slot #1 is x16 and slot #3 is x4

In my head, this just seems like a basic math ratio equation. Please correct me if I have missed something or just do not have the proper understanding. Perhaps this is a different situation because that GPU is only x8 instead of x16 ? Or perhaps it is normal for say a PCIe 3.0 GPU to run at PCIe 2.0 when installed in a PCIe 2.0 slot, but it should maintain its full lane width? (which would make this particular scenario unique and would therefore explain why you did not expect this behavior?)

For example:
8/16 = x/4

8(4) = 16x

32 = 16x

32/16 = x

x = 2

I am just trying to learn more myself and wrap my head around understanding it. Please don't take it like I am trying to contradict or challenge anyone who clearly has more knowledge on the subject

That x16 or x4 is the max supported link width. Not proportion to anything.

If your maths is correct, than if a PCIe 2.0 x1 card install in the x16 slot can negotiate at 5GT/s x1. Then the same card can only negotiate at 5GT/s x0.25 in slot 3, which can't happen.

 

[skizzo]

That x16 or x4 is the max supported link width. Not proportion to anything.

If your maths is correct, than if a PCIe 2.0 x1 card install in the x16 slot can negotiate at 5GT/s x1. Then the same card can only negotiate at 5GT/s x0.25 in slot 3, which can't happen.

The math is deff correct but if I understand your response correct seems like it is just a coincidence that I latched onto for this particular example, and not necessarily something that can be applied as a general rule of thumb.

I assume this phenomenon has some sort of relationship to that the GPU card is PCIe 3.0 x8?
As in if it were a PCIe 2.0 x8 card it likely would not have seen a drop to x2 in a x4 slot (#3)? Meaning the card would read PCIe 2.0 (5 GT/s) x4 in the system report when installed in slot #3 ?

 

[h9826790]

The math is deff correct but if I understand your response correct seems like it is just a coincidence that I latched onto for this particular example, and not necessarily something that can be applied as a general rule of thumb.

I assume this phenomenon has some sort of relationship to that the GPU card is PCIe 3.0 x8?
As in if it were a PCIe 2.0 x8 card it likely would not have seen a drop to x2 in a x4 slot (#3)? Meaning the card would read PCIe 2.0 (5 GT/s) x4 in the system report when installed in slot #3 ?

You maths base on an assumption "The PCIe device negotiation link width has a specific proportion on different slot". Without this assumption, that equation means nothing. And the problem is that your assumption is wrong. Mathematically, if the assumption is wrong, everything behind the assumption is wrong. Therefore, your calculation is correct, but mathematically, the whole thing is wrong (or more precisely, meaningless).

If there is a x16 slot, and you install a x8 card into that slot. You should get x8 link width.

If there is a x8 slot, and you install a x8 card into that slot. You should get x8 link width.

If there is a x4 slot, and you install a x8 card into that slot. You should get x4 link width.

If there is a x1 slot, and you install a x8 card into that slot. You should get x1 link width.

The card should negotiate at the max possible link width according to the slot's capability. But not negotiate at a specific proportion according to the result from a x16 slot.
[doublepost=1525814371][/doublepost]e.g. My KT-4004 USB 3.0 card is a PCIe 2.0 x1 card. Therefore, it negotiate at PCIe 2.0 x1 in a slot 2 (x16 slot), but can also negotiate at 5GT/s x1 in slot 3 (x4 slot).

And my Tempo SSD is a PCIe 2.0 x2 card. It negotiate at PCIe 2.0 x2 in slot 2. But also negotiated at 5GT/s x2 in slot 4.

None of these card will further fallback to lower link width just because not installed in a x16 slot.