There is little need for the Apple Silicon Mac Pro to have RAM slots. Memory can be expanded with CXL memory module over the PCIe bus.
www.anandtech.com
CXL memory is not completely 'transparent' to applications as the main memory is.
We deep-dive into the 4th Generation Intel Xeon Scalable processors, codenamed Sapphire Rapids, to see a huge leap in Xeon capabilities
www.servethehome.com
Pramatically, it pretty much requires being at PCI-e v5 level. Apple has shown no signs of wanting to chase that level any time soon. Further, CXL isn't technically part of the PCI-e standard. It is a seperate protocol that is run over PCI-e physical layer, but the upper levels of the PCI-e protocol. So it requires support on both ends (again Apple would have to step up to another protocol they have shown little outward afinity toward. Apple isn't a memory of CXL consortium. Apple is in AV1 and haven't seen anything out of them for hardware support from them, but at least putting up a 'front' that they are 'on board'. CXL? Nothing. ).
It is better than accessing data on a Optane like DIMM ( non-volatile memory, NVM), but looking at about double the latency (if you are lucky).
Apps that have highly ingrained assumptions that everything is completely uniform latency tend to run into issues when grossly violate their assumptions. All apps won't break , but some likely would.
For example some app code that mapped some 'unified' memory for GPU work that somehow got migrated to CXL and exhibited far more pronounced NUMA artifacts probably would not go over well.
The server vendors that are lining up to use CXL are going to tap dance around the different latency problem.
"...
On the software side, the solution is quite ingenious. Microsoft often deploys multi-socket systems. In most cases, the VMs are small enough that they just fit on a single NUMA node entirely, cores and memory. The hypervisor at Azure attempts to place all core and memory on a single NUMA node, but In some rare cases (2% of the time), a VM has a portion of resources spanning across the socket. This is not exposed to users. ..."
CXL (Compute Express Link) is going to be a transformative technology that will redefine how the datacenter is architected and built. This is because CXL provides a standardized protocol for cache …
www.semianalysis.com
The 'whole app' ( in their context a whole virtual machine) is pointed at the CXL memory pool. If uniformly slower it will still be "uniform".
The major CXL application is completely opposite of applying the 'more remote' RAM as a single pool to a single end user application.
".. At Azure, we find that a major contributor to DRAM inefficiency is platform-level memory stranding. Memory stranding occurs when a server’s cores are fully rented to virtual machines (VMs), but unrented memory remains. With the cores exhausted, the remaining memory is unrentable on its own, and is thus stranded. Surprisingly, we find that up to
25% of DRAM may become stranded at any given moment. ..."
same article.
as opposed to folks trying to load a single 400GB large dataset into memory and chomp on it will all the cores inside the box in a united 'attack on the data'.
macOS does already have some built-in mechanism of identifying 'lightly' or 'unused' data in RAM and compressing it. For example folks who load in 20GB of sound samples and then proceed to only use some 2GB subset for the next 4 hours.
Hugely wasteful, but macOS will try to tap dance around that excessive disuse. CXL could be used as a RAM SSD that they macOS 'compress unused stuff' could shovel stuff into that would free up more primary RAM than compressing the data will. (for example if it is already highly compressed data... trying to compress it some more isn't going to work so well. But if could toss that stuff into some more external, slower pool that would greatly help. It really isn't being actively used anyway. That would be a much closer match to the 'stranded memory' problem. )