Thunderbolt requires not only the x4 PCI-e input, but also x4 lane DisplayPort per stream , and x2 USB 2.0 data lines ( per port. So another x4 for a two port Mac laptop. or another x4 for a four port laptop if already have the two simple USB ports provision on the SoC ) .
For a four port laptop that is another (presuming have two USB ports on nonimal SoC) 28 pins out the bottom of the SoC. ( 8 + 16 + 4 ) . More pins/bumps usually leads to larger package sizes. For the Mac enclosures their is room.
The problem is if Apple is trying to "share" with the logic board constraints iPad Pro. If the MBA and MBP 13" are on same exact sam SoC then the package is probably larger than what is going into the iPad Pro. The issue is whether Apple's Scrooge McDuck tendancies doesn't have them looking at the iPad Pro ( or perhaps iPhone) SoC as a "go to" for the "smallest possible logic board" Mac when their tendancies to thinnest/lightest possible kick in.
The MacBook only needed to be incrementally bigger not to squeeze out the TB controller from the port location. Apple made that call. Doggedly sticking with the butterfly keyboard for 4 years pretty much shows where one of their base line motivations are ( Captain Ahab thinness).
Adding PCI-e lanes isn't a moon shot , "hard" problem. That isn't the core problem with some OCD elements of Apple's design tendencies.