M4+ Chip Generation - Speculation Megathread [MERGED]

[bigglow]

Tech common in current x86 ecosystem that is missing or less developed on current M3 Ultra, M4 Max, M4 Pro, M5 and A19 Pro chips that may appear in future M chips:

- High-Precision AI Compute (FP8 / BF16 / Tensor Support)
- Dedicated AI/GPU Interconnects (NVLink / SXM / CXL)
- HBM (High-Bandwidth Memory)
- FPGA / Reconfigurable Hardware (common on servers)
- Hardware Virtualization Acceleration (VT-x, AMD-V) Parity
- Specialized Video & Encoding Blocks
- Driver Ecosystem Maturity (especially for Open-source ML)
- Multi-Chip Scaling (Chiplets with High-Speed Interconnects)

But based on my informed expectations we can see these occuring

- Larger Neural Engines with wider precision support
- More GPU cores + bigger cache hierarchies
- Increased unified memory ceilings (2–4 TB)
- Better Metal/ML framework optimization
- Smarter heterogeneous scheduling

But fundamental changes like HBM, NVLink-style scaling or user-expandable memory are not likely because they conflict with Apple’s design philosophy of tight integration, efficiency and simplicity.

 

[Basic75]

Tech common in current x86 ecosystem that is missing or less developed on current M3 Ultra, M4 Max, M4 Pro, M5 and A19 Pro chips that may appear in future M chips:

• Availability of ECC memory
• Free choice of CPU to GPU ratio
• More choice of CPU cores to L3 cache ratio
• More than one CPU or GPU per system
• More choice of NUMA topology
• Availability of fast networking
• Availability of ILO/IPMI interfaces
• Availability of redundant PSUs
• Availability of data center cooling solutions
• More choices for operating system and
• Linux has a much better selection of filesystems
• More choice of form factors including the Steam Deck

I"m aware of the new Thunderbolt network supported by macOS, but compare that to e.g. a Bluefield 3 or a ConnectX 8 and you'll see what I mean by "fast networking".

 

[bigglow]

• Availability of ECC memory
• Free choice of CPU to GPU ratio
• More choice of CPU cores to L3 cache ratio
• More than one CPU or GPU per system
• More choice of NUMA topology
• Availability of fast networking
• Availability of ILO/IPMI interfaces
• Availability of redundant PSUs
• Availability of data center cooling solutions
• More choices for operating system and
• Linux has a much better selection of filesystems
• More choice of form factors including the Steam Deck

I"m aware of the new Thunderbolt network supported by macOS, but compare that to e.g. a Bluefield 3 or a ConnectX 8 and you'll see what I mean by "fast networking".

Apple Silicon will continue to add Neural Engine improvements, GPU cores, bigger UMA and better Metal/ML scheduling.

But enterprise/server features (ECC, multi-socket, NUMA control, redundant PSUs, ultra-fast networking) are by design outside Apple’s scope.

The trade-off is efficiency, simplicity and tight integration which is exactly why Apple doesn’t target HPC or data center workloads the same way x86 platforms do.

 

[leman]

Tech common in current x86 ecosystem that is missing or less developed on current M3 Ultra, M4 Max, M4 Pro, M5 and A19 Pro chips that may appear in future M chips:

- High-Precision AI Compute (FP8 / BF16 / Tensor Support)

A19/M5 GPUs have hardware support for both INT8 and BF16 folded dot products. BF16 matmul operates at 4x throughput relative to SIMD data path and INT8 at 8x. What’s interesting is that these units can operate in mixed precision mode with no performance loss due to data conversion - the lower-precision operant will be upcasted to the wider format “for free”. Same goes for transposes - they are built into the register file.

- Hardware Virtualization Acceleration (VT-x, AMD-V) Parity

What is missing now in terms of virtualization features?

 

[bigglow]

A19/M5 GPUs have hardware support for both INT8 and BF16 folded dot products. BF16 matmul operates at 4x throughput relative to SIMD data path and INT8 at 8x. What’s interesting is that these units can operate in mixed precision mode with no performance loss due to data conversion - the lower-precision operant will be upcasted to the wider format “for free”. Same goes for transposes - they are built into the register file.



What is missing now in terms of virtualization features?

Here’s what’s still missing or less mature on Apple Silicon today:

- Nested / Multi-Level Virtualization
- Full Hardware-Assisted I/O Virtualization (VT-d / AMD-Vi)
- Advanced Memory Management / Nested Page Tables
- OS/Hypervisor Ecosystem Integration

Apple Silicon virtualization is good for developer VMs, testing and macOS/Linux guests but it doesn’t match x86 hardware features for full enterprise or cloud-class virtualization especially when you need nested VMs, GPU passthrough or I/O virtualization.

 

[OptimusGrime]

Tech common in current x86 ecosystem that is missing or less developed on current M3 Ultra, M4 Max, M4 Pro, M5 and A19 Pro chips that may appear in future M chips:

- High-Precision AI Compute (FP8 / BF16 / Tensor Support)

M5 has Tensors and BF16 has been available since the M2 I believe.

- Dedicated AI/GPU Interconnects (NVLink / SXM / CXL)
- HBM (High-Bandwidth Memory)
- FPGA / Reconfigurable Hardware (common on servers)
- Hardware Virtualization Acceleration (VT-x, AMD-V) Parity

Parity for what hardware? If there are no dgpus what would they pass through? Nested virtualization is there in the hardware.

- Specialized Video & Encoding Blocks

What? Apple Silicon absolutely has specialized video encoding blocks.

 

[name99]

Tech common in current x86 ecosystem that is missing or less developed on current M3 Ultra, M4 Max, M4 Pro, M5 and A19 Pro chips that may appear in future M chips:

- High-Precision AI Compute (FP8 / BF16 / Tensor Support)
- Dedicated AI/GPU Interconnects (NVLink / SXM / CXL)
- HBM (High-Bandwidth Memory)
- FPGA / Reconfigurable Hardware (common on servers)
- Hardware Virtualization Acceleration (VT-x, AMD-V) Parity
- Specialized Video & Encoding Blocks
- Driver Ecosystem Maturity (especially for Open-source ML)
- Multi-Chip Scaling (Chiplets with High-Speed Interconnects)

But based on my informed expectations we can see these occuring

- Larger Neural Engines with wider precision support
- More GPU cores + bigger cache hierarchies
- Increased unified memory ceilings (2–4 TB)
- Better Metal/ML framework optimization
- Smarter heterogeneous scheduling

But fundamental changes like HBM, NVLink-style scaling or user-expandable memory are not likely because they conflict with Apple’s design philosophy of tight integration, efficiency and simplicity.

BF16 is definitely present on CPU and GPU. I'm not sure about ANE.
Tensor support (I assume by this you mean high perf matrix multiply) is present on all three.

FusionLink is the equivalent of NVLink

Apple gets the performance they need (bandwidth equivalent to HBM in the equivalent desktop HW) via many LPDDR5X channels. This *may* run out of steam - the main thing HBM gives you is overcoming the shoreline limitation of Apple's type of solution. But there are many alternative ways to continue growing via Apple's path.

You do realize that Apple runs their machines as hypervisors TODAY, right? The innermost most protected part of Darwin, the part that controls page tables, runs as a hypervisor, and has since at least A10. I'm unaware of any serious complaints about the performance of any third party virtualized OS (eg Linux, or a second copy of macOS) compared to x86.

I'm not going to bother with the rest. This feels like massive clickbait, or truly serious ignorance, of the sort that doesn't want to be cured.

 

[name99]

Apple Silicon will continue to add Neural Engine improvements, GPU cores, bigger UMA and better Metal/ML scheduling.

But enterprise/server features (ECC, multi-socket, NUMA control, redundant PSUs, ultra-fast networking) are by design outside Apple’s scope.

The trade-off is efficiency, simplicity and tight integration which is exactly why Apple doesn’t target HPC or data center workloads the same way x86 platforms do.

Umm, you do know that Apple are not just building servers, but data warehouses right now?
And have multiple patents describing what they are doing, patents that clearly build on the strengths of their SoCs, and do frequently do things rather differently than x86, though ultimately solving the same problems.

 

[crazy dave]

Safari.
View attachment 2590147

I have no idea! The changes all look like they're in presentation, not content, but since someone (github?) seems determined not to let me see them, who knows?

I took me several times (I got a unicorn saying it was taking too long to load), but eventually I got through. Not sure what's going on.