Predicted display support on M2? More displays than M1? 8k? HDMI 2.1? DP Alt Mode2.0?

[theorist9]

USB4 isn't a monolithic standard, and alt modes are optional. The difference is that an alt mode is a USB-C extension, not specifically part of the protocol. The other difference is that USB4 can tunnel DP data, using the same techniques that Thunderbolt can. However, much like Thunderbolt, there's no provisions for requiring a specific revision of DisplayPort for tunneling to work. And even if USB4 did require that USB controller chips supported DP2.0, you still need a source of data that operates at that speed for it to do any good. This is the problem. You need the whole chain to support DisplayPort 2.0, not just a single part of it. And if I was a standards body, I wouldn't want to wait for the whole chain to move over before "USB4" products existed.

All that said, because DP2.0 uses a similar PHY layer to USB4, I would expect it does make certain implementations easier.



Make sure you are comparing either bandwidth to bandwidth, or data rate to data rate. You seem to have mixed the two up here. DP1.4's data rate is just under 26Gbps. And Thunderbolt's bandwidth, including the dedicated display signal portion is indeed 40Gbps, while 8Gbps of that is dedicated to. Thunderbolt should get around 32Gbps data rate if all you are doing is carrying a display signal, so a little over 6Gbps more data rate or just shy of 8Gbps more bandwidth. Both DP1.4's PHY layer and Thunderbolt 3/4 both use 8b/10b coding AFAICT, so the bandwidth numbers are comparable in this case since you get the same data rates from the same bandwidth. That said, when talking about tunneled DP data, it's the data rates that are important. Since that sets the limit of the data carried per stream across a USB4 or TB cable.

You responded to an older version of my post. You probably didn't see the revision since you were working on replying to mine.

 

[Krevnik]

Given that the ability to turn duplex into simplex seems to offer such an obvious benefit, why couldn't TB implement this without having to wait for DP to do it?

I’m not sure what you mean by this, exactly.

Simplex mode means only one side can talk at a time. It complicates bi-directional communication at the PHY layer by having to manage who can talk over the wires and risking bus contention. DisplayPort, when tunneled doesn’t offer a simplex mode. It only offers a simplex mode in the USB-C alt-mode where it takes control of the USB-C port. When the alt-mode is used, it’s not a USB bus anymore, it’s a DisplayPort bus (with a couple data pins left that can still carry USB2).

So what is TB ”waiting for”? Why would it want a simplex mode when it is built for bi-directional communication? What would it help?

How is it relevant that DP1.4's bandwidth (25.92 GB/s*) is less than TB4's (38.88 Gb/s*), given the Macs can do TB4? [*max payload bandwidth, which is less than max link bandwidth.]

I still don’t know where the 38.88 Gbps comes from. TB4 still uses 10b/8b coding (because it is TB3), so should be capped at 32Gbps data rate. USB4 should be able to get to 38.78Gbps with the newer 132b/128b coding it employs, but that coding isn’t compatible with Thunderbolt devices, AFAIK.

That said, you kinda answer the question with your edit anyways. Thunderbolt can tunnel multiple DisplayPort streams.

 

[theorist9]

I’m not sure what you mean by this, exactly.

Simplex mode means only one side can talk at a time. It complicates bi-directional communication at the PHY layer by having to manage who can talk over the wires and risking bus contention. DisplayPort, when tunneled doesn’t offer a simplex mode. It only offers a simplex mode in the USB-C alt-mode where it takes control of the USB-C port. When the alt-mode is used, it’s not a USB bus anymore, it’s a DisplayPort bus (with a couple data pins left that can still carry USB2).

So what is TB ”waiting for”? Why would it want a simplex mode when it is built for bi-directional communication? What would it help?

I don't know if a simplex mode could be implemented in TB4. But if it could, the benefit would be the same as that described here, i.e., the ability to support an outgoing bandwidth of 77.37 Gb/s. And if TB4 could do that on its own, we'd have that capability w/o needing to wait for DP 2.0:

https://forums.macrumors.com/threads/predicted-display-support-on-m2-more-displays-than-m1-8k-hdmi-2-1-dp-alt-mode2-0.2344297/page-2?post=31090425#post-31090425

But you already know that's the benefit of a simplex mode, so I'm not sure what's puzzling you.

still don’t know where the 38.88 Gbps comes from. TB4 still uses 10b/8b coding (because it is TB3), so should be capped at 32Gbps data rate. USB4 should be able to get to 38.78Gbps with the newer 132b/128b coding it employs, but that coding isn’t compatible with Thunderbolt devices, AFAIK.

That said, you kinda answer the question with your edit anyways. Thunderbolt can tunnel multiple DisplayPort streams.

I got the 38.88 Gb/s from here:

Pro Display XDR at 120Hz bandwidth calculations

Pro Display XDR at 120Hz bandwidth calculations. GitHub Gist: instantly share code, notes, and snippets.

gist.github.com

But he doesn't give much explanation for it, so I don't know for certain if that's the max link bandwidth or the max payload bandwidth (aka the throughput).

 

[Krevnik]

I don't know if a simplex mode could be implemented in TB4.

It can’t. This is part of my confusion. You are talking about a spec revision of Thunderbolt that requires new devices and displays to get any benefit from. On top of that, without DP2.0, you are really just adding more links/streams, which means more complexity/tiling. And if the best you can do is match DP 2.0, there’s not really much point making the changes now. Best to keep the Thunderbolt and USB modes bi-directional and let the DisplayPort mode do what it wants, really.

So, why should we rev the Thunderbolt spec when all it would do is be more complex, and no better than DP2.0’s alt mode?

I got the 38.88 Gb/s from here:

Pro Display XDR at 120Hz bandwidth calculations

Pro Display XDR at 120Hz bandwidth calculations. GitHub Gist: instantly share code, notes, and snippets.

gist.github.com

But he doesn't give much explanation for it, so I don't know for certain if that's the max link bandwidth or the max payload bandwidth (aka the throughput).

He gives enough detail that you can work things out. He’s claiming it can handle a full 4 lane stream, plus a 2 lane second stream. So if you multiply the number by 4/6 (to take the 6 lanes included in the number, down to 4) you get 25.92Gbps, so he’s claiming that is the data rate. I’m not really sure how you achieve that data rate with 10b/8b coding though, as you’re now pushing 48.6Gbps of bandwidth, which is in excess of what the setup should be capable of. So either there’s a math error, or there’s something else going on.

As there’s no display that actually uses this high a data rate, which makes me think it’s a math error. The data rate calculator I shared a while back in the thread says 34.56Gbps max data rate of Thunderbolt 3/4 which also seems a bit high, but does accurately list everything else, so it at least seems appropriate.

 

[theorist9]

It can’t. This is part of my confusion. You are talking about a spec revision of Thunderbolt that requires new devices and displays to get any benefit from. On top of that, without DP2.0, you are really just adding more links/streams, which means more complexity/tiling. And if the best you can do is match DP 2.0, there’s not really much point making the changes now. Best to keep the Thunderbolt and USB modes bi-directional and let the DisplayPort mode do what it wants, really.

So, why should we rev the Thunderbolt spec when all it would do is be more complex, and no better than DP2.0’s alt mode?

I think you misunderstood me. When I wrote the following (see below), I wasn't suggesting Intel should implement changes to the TB4 standard now. I meant, given the obvious benefits simplexing provides (being able to support much higher unidirectional data rates without, or with less, compression), why didn't they incorporate this as an option into the TB4 standard from the start?

Clearly it was known there would be a need for these high unidirectional data rates, as evidenced by VESA's release of the DisplayPort Alt Mode 2.0 spec in April 2020. But, without offering the same spec option for TB4, this left Intel having to wait for it to be implemented with DisplayPort before its TB4 hardware could support such unidirectional data rates.

Is the issue that TB and DisplayPort are qualitatively different types of standards, such that using DP makes it qualitatively easier to implement this on TB hardware? I.e., I know you're saying that, as things stand now, it's much easier to implement this on TB hardware using DP than to try to revise TB4. But what if Intel had included a simplex spec as an option within the TB4 standard from the start?

I think there's a lot of confusion about the difference between DP, TP, and USB, since today they all use the same USB-C port; and I've not been able to find a clearly written article that deconvolutes this. So I've no idea if the the follwing is correct, but here's the sort of big-picture conceptual explanation that would make sense to me:

"TB4 is principally a hardware specification, while DP 2.0 is a data transmission protocol that is implemented on top of TB4. Thus if you wanted to implement the simplexing in TB4, that would require dedicated duplex and simplex channels, which would be complicated and expensive. Thus it makes more sense to keep the hardware purely duplex (as it is right now), and implement simplexing by just redirecting where the traffic goes, which is what DP Alt Mode 2.0 does."

Given that the ability to turn duplex into simplex seems to offer such an obvious benefit, why couldn't TB implement this without having to wait for DP to do it?

 

[Krevnik]

I think you misunderstood me. When I wrote the following (see below), I wasn't suggesting Intel should implement changes to the TB4 standard now. I meant, given the obvious benefits simplexing provides (being able to support much higher unidirectional data rates without, or with less, compression), why didn't they incorporate this as an option into the TB4 standard from the start?

Because TB4 isn’t a new standard. I keep pointing out that TB4 is TB3. Nothing has changed in terms of signaling, etc.

I think there's a lot of confusion about the difference between DP, TP, and USB, since today they all use the same USB-C port; and I've not been able to find a clearly written article that deconvolutes this. So I've no idea if the the follwing is correct, but here's the sort of big-picture conceptual explanation that would make sense to me:

"TB4 is principally a hardware specification, while DP 2.0 is a data transmission protocol that is implemented on top of TB4. Thus if you wanted to implement the simplexing in TB4, that would require dedicated duplex and simplex channels, which would be complicated and expensive. Thus it makes more sense to keep the hardware purely duplex (as it is right now), and implement simplexing by just redirecting where the traffic goes, which is what DP Alt Mode 2.0 does."

You are right that there’s a lot of confusion.

DP, TB and USB are different specs and different modes that a USB-C port can operate in. They share similarities in their signaling at this point, but they are not the same thing. DP at 80Gbps is a USB-C alt mode, TB is a USB-C alt mode, USB3/4 isn’t an alt mode, but it is a mode. And a port can only be in one mode when the connection is made. What DP does with their alt mode has zero impact on how TB or USB operate when it has control over the port. When VESA and USB-IF talk about building on the TB spec, they are talking about leveraging the sort of signaling that Thunderbolt employs at the PHY layer that enables the high data rates. But neither DP 2.0’s alt mode, nor USB4, even use compatible signaling to TB3/4. USB4 cannot talk to TB devices without the port controller chip also supporting TB alt mode.

Even with DP Alt Mode 2.0, TB doesn’t and will not support unidirectional signaling, and doesn’t need to. It’s two different specifications and modes. You can’t tunnel DP 2.0 over TB or USB4 and get the faster 80Gbps mode, and that’s not going to change either.

And yes, Intel does create port controllers that multiplex USB, TB and DP, so implementers can just buy a chip to drive the port, but this doesn’t mean the DP alt mode is now Thunderbolt.

 

[darngooddesign]

Anker says its new USB-C hub lets M1 MacBooks output to three external monitors

The 10-in-1 hub costs $249.99.

www.theverge.com

 

[theorist9]

Anker says its new USB-C hub lets M1 MacBooks output to three external monitors

The 10-in-1 hub costs $249.99.

www.theverge.com

Interesting. Though it's expensive (25% of the base cost of an MBA), and appears limited to one 4k@60Hz plus one monitor at 30Hz—probably b/c it's divvying up the bandwidth from a single video port.

 

[jdb8167]

Interesting. Though it's expensive (25% of the base cost of an MBA), and appears limited to one 4k@60Hz plus one monitor at 30Hz—probably b/c it's divvying up the bandwidth from a single video port.

Not really interesting. It is just another Display Link dock. It will have all the same problems as the rest of them.

 

[Bustycat]

I got the 38.88 Gb/s from here:

Pro Display XDR at 120Hz bandwidth calculations

Pro Display XDR at 120Hz bandwidth calculations. GitHub Gist: instantly share code, notes, and snippets.

gist.github.com

But he doesn't give much explanation for it, so I don't know for certain if that's the max link bandwidth or the max payload bandwidth (aka the throughput).

So according to this, Pro Display XDR can be raised to 120 Hz without using DisplayPort 2.0, as the display has already used DisplayPort 1.4 with DSC, and it allows 6K resolution and 120 Hz. DSC is lossless to human eyes.