Rumored pro chip

[theluggage]

I mean the iPad Pro being on an A12X/A12Z with the iPhone on A13 and A14 didn't really confuse people about how much more powerful the iPad Pro was over the iPhone.

Sure, but it wasn't perfect, and Apple Silicon on Mac is a chance for a clean start (it's already fixed the A12Z problem now the iPad Pro is using M-series chips). Also, the iPhone itself is on a nice, predictable annual release cycle, so the incremental numbering mostly makes sense. The Mac range is more complex and diverse, with product cycles between 6 months and 3 years, and I don't think that many consumers are weighing up "do I get an iPhone or an iPad Pro" in the same way as people might find themselves deliberating between a 13" MBP with M2 and a 14" MBP with M1x.

We had a bit of that with Intel's "processor generations" with Apple getting flack about machines being a generation "behind" even though the right combination of TDP, cores and GPU wasn't available in the new generation.

Anyway, my point isn't "I'm right and you're wrong about processor numbering" - nobody knows - the problem is that some people here are starting to build arguments about the plausibility of rumours and the likelihood of new features based solely on what they think Apple's processor numbering scheme should be.... something that could change on a marketing wonk's whim without technical consequences.

It already sounds like they're using "cool code names" like "Jade" during development.

N.b. The A12Z was likely a 'binned' version of the A12X with the 8th GPU core enabled and (maybe) capable of slightly higher clock speeds (https://en.wikipedia.org/wiki/Apple_A12Z) so Apple would have been quite consistent if they'd called the 8-GPU-core version of the M1 the "M1a" or something. It's all ultimately a marketing choice.

 

[Apple Knowledge Navigator]

What stood out for me when Apple Silicon was announced was the use of "a family of SoC for Mac". Yes, this could take into account that several generations of M-series chips will be available in the future (i.e, the M1 could easily be around for at least 2 years), but I imagine that it will span three tiers; the base, upper and best chip of that generation. So if this was relevant to the current generation, it would be M1, M1X and M1Z.

 

[quarkysg]

IMHO, the fact that Apple can scale their SoC from low power devices to desktop class computer is an incredible feat, which nobody has done before.

 

[thenewperson]

Because the 4+4 will be used on the iPad Pro and the MacBook Air and in those applications, battery life is as important as overall performance and four efficiency cores improves battery life.

The MacBook Pros will have larger batteries so while only having two efficiency cores will increase battery drain when jobs have to be off-loaded to the performance cores, the larger battery capacity will help offset this.

True, but then they'd use more power due to having more performance cores, as well as larger displays. But I guess they could have bigger-enough batteries to offset things such that 2 cores won't be a detriment. I'm of the assumption that it's a new architecture where 2 performance cores is enough to do what 4 would in the A14/M1.

Desktops arguably do not need efficiency cores since they are always on main power, but there are side benefits with lower power consumption and lower heat generation when they can do the job instead of handing it off to a performance core.

Right, but then it's the desktop chips that are somehow getting up to 8 performance cores. That, along with the 2 in the MBPs is what's so weird.

 

[Bodhitree]

Going to two efficiency cores would be a strange move. The four efficiency cores in M1 take up the same amount of space on the die as one performance core, so it doesn’t gain you much there, and the reasoning for supporting the OS with four efficiency cores is unlikely to be different for a larger SoC. Plus the extra design effort. I think we will have to wait and see, you can’t tell much from rumours anyway. I think a 12-core, 8+4 setup makes a lot more sense.

 

[JMacHack]

And besides, the 11980HK isn't intel's fastest chip, at least the 10980HK isn't even close, as it's a slow mobile chip.

You know what, I feel like taking another dig at intel.

They aren’t standing still, you’re right they’re moving backwards.

Intel Core i7-11700K Review: Blasting Off with Rocket Lake

www.anandtech.com

 

[CWallace]

Right, but then it's the desktop chips that are somehow getting up to 8 performance cores. That, along with the 2 in the MBPs is what's so weird.

The 14" and 16" MacBook Pro are also rumored to be getting the 8P+2E M-series SoC as the "iMac Pro" and "Mac mini Pro".

 

[CWallace]

It was speculated that ”chop” is a “die” with 16 GPU cores cut off. There is some logic to that I suppose…

It does make sense. As cmaier has noted, they could just use a different mask for the 16-core and 32-core models.

I don't think we're going to see a Jade 2C-Die, much less a Jade 4C-Die due to power consumption, heat generation and production yields.

I am intrigued by your hearing that Apple might just use two or four Jade C-Dies in a multi-processor arrangement on the next Mac Pro to reach the 20+64 and 40+128 cores it is rumored to have.

 

[leman]

I am intrigued by your hearing that Apple might just use two or four Jade C-Dies in a multi-processor arrangement on the next Mac Pro to reach the 20+64 and 40+128 cores it is rumored to have.

I think that’s what John Siracusa posted on his Twitter, but maybe I misunderstood.

 

[thenewperson]

I think that’s what John Siracusa posted on his Twitter, but maybe I misunderstood.

No, that’s exactly what he meant. They went into more detail on their podcast.

(Well technically I think it was Marco that made that speculation while Jon implied it but was unsure)

 

[EntropyQ3]

What I like about Siracusas images is that they demonstrate that the die areas would still remain modest (although I doubt that Apple would cut back the NPU resources).

 

[Joelist]

I am still expecting the next SOC to be based on M1 but with more cores and cache and RAM and additional controllers - so yes obviously the wafer will be larger even on 5nm. My thoughts are:

- 4 more Performance Cores
- 16 more GPU cores
- All caches doubled
- RAM doubled at all levels and a faster type of RAM too

 

[Rickroller]

Long time lurker, first time poster.

I think that base for next systems is a new core architecture as well. Everyone knows after looking at the M1 that Apple could have built an ‘M1X’ for a new 14 or 16 inch device, and it would be a very competitive product. A little more complicated for a new 32 inch iMac/iMac Pro, but still doable.

Apple don’t plan on being competitive. The competition can muddy the waters with cherry picked benchmarks or increasing TDP to ridiculous levels as well as other sleight of hand eg. Intel using liquid nitrogen to show off a new super duper 28 core CPU to spoil AMDs 32 core Threadripper parade.

Intel 28-core fantasy vs. AMD 32-core reality

After a busy week at Computex 2018, looking back we can say there weren't many big announcements at the show but perhaps one of the most exciting...

www.techspot.com

I think that’s one of the reasons AMD ended up releasing the 64 core Threadripper version. No tricks were gonna save Intel from embarrassment with that one. AMD learned that lesson the hard way.

I think the next Apple Silicon ‘M2’ will have the fastest CPU Core in the world. And no amount of twisting from PCMR will change that. I think Apple didn’t enjoy the need to add ‘Low Power’ to their statement when they announced the M1. I think the original graphic didn’t include the caveat.


My prediction for the M2 core is for a paradigm shifting Geekbench score of 2545 on a single core.


Apple themselves won’t be touting any numbers, especially this sort of score. They’ll use the same vague chart every doubter used to justify not believing what Apple had claimed about the M1 performance. Why not let Linus do the marketing for you...?

 

[theorist9]

An 128-core Apple GPU with the same specs as an M1 would have 16384 ALUs and peak throughput of 41.6 FP32 TFLOPS.

So that would approximately equal the fastest single-card GPU setup (among cards designed for professional video editing/rendering). I wonder what proportion of the customer base for the Mac Pro needs more than that (e.g., capabilities akin to a dual-Quadro setup).

Of course, TFLOPs is a very rough predictor of GPU performance. I could ask what would happen if we took the OctaneBench, Redshift, or VRAY-RT rendering benchmars for the M1 (if such exist yet) and multiplied them by 128/8, but, presumably, the 128-core GPU will be a different class of design from the M1's, because it's intended for different applications.

 

[quarkysg]

So that would approximately equal the fastest single-card GPU setup (among cards designed for professional video editing/rendering). I wonder what proportion of the customer base for the Mac Pro needs more than that (e.g., capabilities akin to a dual-Quadro setup).

Of course, TFLOPs is a very rough predictor of GPU performance. I could ask what would happen if we took the OctaneBench, Redshift, or VRAY-RT rendering benchmars for the M1 (if such exist yet) and multiplied them by 128/8, but, presumably, the 128-core GPU will be a different class of design from the M1's, because it's intended for different applications.

Imagine if this monster of an SoC powering a desktop in an iMac form factor. I think it’ll sell well for Apple’s customer base that need computing and graphics power without the need for expandability. My bank account will hate me if this comes to pass ?

Quite unlikely for this to go into a mobile form factor.

 

[Rickroller]

Continuing on from my previous post...


The 2545 Geekbench number seems stupid and ridiculous and fantasyland stuff, but when you look at it as simple inconsequential numbers, it’s weirdly easily doable if we look at what Apple has been able to achieve over the last decade with their A series chips.

M1 has a current single core of 1700 or so...a cumulative improvement in all or some using a combination of...

IPC improvements of 10 to 15 percent...?

TDP/Frequency increase of 10 percent from 3.2GHz to 3.5GHz...?

Higher Memory Bandwidth going from LPDDR4x to LPDDR5 of 50 percent ...?

***( LPDDR5 or HBME2)

TSMC 5nm updated PDK for maybe another 7.5 to 12.5 percent ...?



Apple M2 high performance core
1700 x 1.5 = 2550.


I’m estimating a 50 percent improvement by adding up all the smaller improvements everywhere, but maybe these are fantasy numbers for a single core. Even from Apple.

 

[cmaier]

Continuing on from my previous post...


The 2545 Geekbench number seems stupid and ridiculous and fantasyland stuff, but when you look at it as simple inconsequential numbers, it’s weirdly easily doable if we look at what Apple has been able to achieve over the last decade with their A series chips.

View attachment 1779815

M1 has a current single core of 1700 or so...a cumulative improvement in all or some using a combination of...

IPC improvements of 10 to 15 percent...?

TDP/Frequency increase of 10 percent from 3.2GHz to 3.5GHz...?

Higher Memory Bandwidth going from LPDDR4x to LPDDR5 of 50 percent ...?

***( LPDDR5 or HBME2)

TSMC 5nm updated PDK for maybe another 7.5 to 12.5 percent ...?



Apple M2 high performance core
1700 x 1.5 = 2550.


I’m estimating a 50 percent improvement by adding up all the smaller improvements everywhere, but maybe these are fantasy numbers for a single core. Even from Apple.

You’re double counting a bit. TSMC update is what enables the frequency update, etc.

But, yeah, I’m expecting a pretty big bump. The way I figure it is 20% from normal year-over-year improvements, plus the ability to increase TDP for these bigger form factors.

 

[quarkysg]

Apple M2 high performance core
1700 x 1.5 = 2550.


I’m estimating a 50 percent improvement by adding up all the smaller improvements everywhere, but maybe these are fantasy numbers for a single core. Even from Apple.

It’ll be awfully impressive if Apple can achieve that, but I think it’ll be unlikely. Increase in memory bandwidth will not be significant IMHO as it’ll likely get masked by the SoC cache memory. IPC and frequency improvement should be more apparent. From how I understand it, frequency increase present timing challenges, which might then impact IPC, so on and so forth, so it’s always an engineering trade off.

I’ll be mighty impressed if Apple can pull off a 20% generational improvement.

 

[Rickroller]

You’re double counting a bit. TSMC update is what enables the frequency update, etc.

But, yeah, I’m expecting a pretty big bump. The way I figure it is 20% from normal year-over-year improvements, plus the ability to increase TDP for these bigger form factors.

Yeah I’m not up to date on the technicalities of the process side of things, I’m just betting on what performance targets Apple aimed for with theM2, and what they would need to do to achieve the attention needed to sell these products which won’t be cheap. Also Apple would probably want to put a fair bit of distance from AMD who might be too close to their heels when they also move to 5nm. M2 for these high performance parts will probably be on 24 month cycles...?

 

[cmaier]

Yeah I’m not up to date on the technicalities of the process side of things, I’m just betting on what performance targets Apple aimed for with theM2, and what they would need to do to achieve the attention needed to sell these products which won’t be cheap. Also Apple would probably want to put a fair bit of distance from AMD who might be too close to their heels when they also move to 5nm. M2 for these high performance parts will probably be on 24 month cycles...?

I can absolutely guarantee you that Apple isn’t thinking about AMD even one little bit (other than the fact that many of the CPU folks at Apple are AMD alumni). They just need to stick to their own roadmap. If they get 20% year-over-year performance increase for the foreseeable future while keeping within TDPs much smaller than their existing Intel-based machines, they will never have to worry about anything anyone else does (at least until somebody does something truly crazy).

 

[Joelist]

As long as Apple maintains their current situation of there microarchitecture being able to do double or more the work per clock cycle as the competition they have nothing to worry about.

 

[Rickroller]

I can absolutely guarantee you that Apple isn’t thinking about AMD even one little bit (other than the fact that many of the CPU folks at Apple are AMD alumni). They just need to stick to their own roadmap. If they get 20% year-over-year performance increase for the foreseeable future while keeping within TDPs much smaller than their existing Intel-based machines, they will never have to worry about anything anyone else does (at least until somebody does something truly crazy).

why do feel they only need 20% for this iteration though...? Also I’m assuming 20% is what they were able to achieve year to year with the knowledge that they would only be used in low power iPads and iPhone. Maybe they thought differently this time knowing they needed to also put them in the 16 inch MPB, iMacs and Mac Pros...?

 

[Rickroller]

It’ll be awfully impressive if Apple can achieve that, but I think it’ll be unlikely. Increase in memory bandwidth will not be significant IMHO as it’ll likely get masked by the SoC cache memory. IPC and frequency improvement should be more apparent. From how I understand it, frequency increase present timing challenges, which might then impact IPC, so on and so forth, so it’s always an engineering trade off.

I’ll be mighty impressed if Apple can pull off a 20% generational improvement.

In the Anandtech deep dive, one of the cores in the M1 this line seems important.

”breaking: A single Firestorm achieves memory reads up to around 58GB/s, with memory writes coming in at 33-36GB/s. Most importantly, memory copies land in at 60 to 62GB/s depending if you’re using scalar or vector instructions. The fact that a single Firestorm core can almost saturate the memory controllers is astounding and something we’ve never seen in a design before.”

Better memory controllers with higher bandwidth could be more important than one would think...also I think LPDDR5 has specific special sauce to help with the issues with timings...?

 

[quarkysg]

why do feel they only need 20% for this iteration though...? Also I’m assuming 20% is what they were able to achieve year to year with the knowledge that they would only be used in low power iPads and iPhone. Maybe they thought differently this time knowing they needed to also put them in the 16 inch MPB, iMacs and Mac Pros...?

Well, setting hard but realistic goals does wonder for team morale when the goals are achieved. I would imagine team morale over at Intel would be pretty low at the moment. It’s a vicious cycle really.

Apple already have the fastest CPU core, as they claimed in their marketing material by doing what they are doing over the past 10 years, so I’m confident they know what they are doing.

 

[quarkysg]

In the Anandtech deep dive, one of the cores in the M1 this line seems important.

”breaking: A single Firestorm achieves memory reads up to around 58GB/s, with memory writes coming in at 33-36GB/s. Most importantly, memory copies land in at 60 to 62GB/s depending if you’re using scalar or vector instructions. The fact that a single Firestorm core can almost saturate the memory controllers is astounding and something we’ve never seen in a design before.”

Better memory controllers with higher bandwidth could be more important than one would think...also I think LPDDR5 has specific special sauce to help with the issues with timings...?

Of course, higher memory bandwidth definitely helps improve thruput. For small computational workload that fits in L2 cache, the benefits will likely be less, which is what most benchmark measures. Workload that chews thru big datasets will definitely benefit.

Monstrous bandwidth definitely helps GPU performance tho.