What can we expect in next nMP revision?

[Joe The Dragon]

Yeah no kidding... Is this official?

The key difference here is that it shows the USB hanging off the PEX switch instead of the PCH (Anand's assumption).

And if this is correct, it shows the SSD attached to the display GPU which blows any theory of interconnect pin constraints out the door.

EDIT: if you load the image into a tab, it's a bit more legible.

Other Noteworthy Observations:
- WiFi is actually PCIe 1.0 (still plenty of bandwidth though)
- USB3 is still only single lane despite the fact that it and the three TB controllers are sharing 8 3.0 lanes which is the equivalent of 16 2.0 lanes (thus they could have opted to give USB x4 without impacting TB performance - an odd choice to artificially limit it - maybe a limitation of the USB chipset they selected?)
- The Crossfire connection is noted as "CVO Connection". I wonder what that stands for.

Very interesting.

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Sorry, I missed this... Nice find! Some of what I thought was nonsense now makes sense. .

Where does this come from? Is there a higher res version anywhere?

Anyway, thanks for sharing.

PCI 3.0 is a little under 2 times 2.0. Maybe they can get 2 2.0 lanes for USB 3.0.

Maybe they want all TB buses being able to MAX out all the time.

The Prototype? had the wiring? but no slot fitted for an 2th SDD card maybe they had 1 SDD on the X4 space and one on the X4 from PCH with USB 3.0 on the open X1 on PCH.

Maybe the DMI link was to loaded or the TB buses where being slowed down by having the SDD on the PLX.

May be why USB 3.0 is only useing an X1 link as stuff got moved.

 

[deconstruct60]

A columnist for Mac Life wrote ....but it sounds like he was saying TB will end up like FireWire.

Incrementally deployed until it is on several 100's of millions of device like Firewire? Well, probably yes. Firewire's failure at this point is adaption after it got market acceptance.

External PCIe isn't even 2 order of magnitude close to that level and it has been out for years longer than Thunderbolt (2007 vs 2010-2011) .

What do you all think of PCIe OtB?

It is limited and will stay limited. Folks like to cherry pick off corner cases where there is a bit more bandwidth than Thunderbolt, but for general usage there are several problems.

a. as usually implemented it is a PCIe card. If have a card not particular solving issue with vast majority of PC systems. Also typically just 1-to-1 connection between devices.

The external PCIe card enclosure market has had prices in the TB device level all along. Those vendors are going to give that up??

b. Between Thunderbolt and yet another DisplayPort extension
http://www.anandtech.com/show/7649/dockport-adopted-as-official-extension-to-displayport-standard
the number of deployed DisplayPort instances is far greater than external PCIe. The port is already present in system designs where the External PCIe is not.

[ As long as there are multiple alternatives to Thunderbolt the competitors are going to find trouble building momentum unless there is industry leader in system designs bankrolling it.

For example, if USB 3.1 is suppose to "beat down" Thunderbolt, then External PCIe is an even weaker target with far fewer deployed instances and even smaller market adoption. ]

c. Power distribution. Dongles and single drives can't be the primary foundation of devices but if peel them off won't build as high of volume.

 

[Gav Mack]

Haswell-EP
DDR4

no other changes.

New socket probably
USB 3.0 will be built in the chipset
Probably a slightly larger PSU as the haswell EP are 135/140w.
Possibility of future CPU upgrade to Broadwell EP

 

[deconstruct60]

... and will never see the light of day on a Mac which is the only growing segment of the PC market.

Chrome devices are growing. classic form factor growth appears to be a bit of "rearranging the deck chairs". Windows exodus to other similar form factors. Chrome on the low end and Macs on the high end. The growth in personal computers is in tablets which is dominated by iOS and Android growth.

The Mac ecosystem at this more coherent and organized than the classic Windows PC systems. Those vendors are either shooting at everything hoping to hit something or running scared ( or quiting ... Sony. )

 

[deconstruct60]

New socket probably

New but not new. Same number of pins. But it won't be electrically compatible (and probably not physically .. with extra notch or something to keep folks from screwing up )

USB 3.0 will be built in the chipset

SATA and USB 2.0 are built into the chipset and Apple isn't using them at all. Just because the chipset has it doesn't mean Apple is going to use the chipset's version.

The next iteration of PCIe SSD is likely going to be faster which will squeeze the PCH bandwidth harder.

Probably a slightly larger PSU as the haswell EP are 135/140w.

The PSU is sandwiched between the I/O and CPU boards. There isn't much room to "grow" physically. If mean grow output in power.... if E5 v3 (Haswell EP ) pulls in power regulation like the desktops did then this power "increase" can largely be just a balloon squeeze from a system perspective. External parts got pulled inside the CPU package 'black hole'. That doesn't merit an overall increase in system power.

The new system C610 series PCH chipset is likely a bit lower too. Thunderbolt 2 2nd generation may be bit lower also.. Likewise other components.

If Mac Pro's power distribution (e.g., powering several TB and USB ports ) turns out to be flakey maybe they will crank up the PSU but suspect that is a budget that isn't going to move much.

Possibility of future CPU upgrade to Broadwell EP

As second half of service life extension perhaps. Probably not going to be a mainstream option.

 

[Luba]

But yes can add defacto ECC behavior to a file system so that get ECC protection from RAM cache all the way down to persistent data stored on drives. ZFS , Microsoft's RFS, and BTRFS file systems with checksums and redundant (mirror/RAID) data storage can detect and correct for errors.

So RAID 1 has ECC? What about RAID 5 or RAID 6? They have parity, but aren't redundant, so would 5 or 6 have ECC?

 

[deconstruct60]

So RAID 1 has ECC?

Typically no. (it isn't mandated). A RAID 1 implementation could pull both copies and make sure the integrity is still good, but that isn't normal or mandated.

Since the drives have it layering it on top is seen as more so protection on the path to/from the drive

If implemented in hardware RAID then yes it should have it on the buffers and cache store.

What about RAID 5 or RAID 6? They have parity, but aren't redundant, so would 5 or 6 have ECC?

That kind of parity is redundancy.

Again there is no requirement to check the data integrity. The parity is only used in event of the obvious failure , not silent ones. If nothing checks for data integrity failures then extremely unlikely to find them.

Some RAID management systems have a "data scrubbing"/"data integrity" modes where in their 'spare time' they go off and check for bit rot. But outside of that special mode they aren't checking. The normal mode is "faster is better than correct" mode.

In RAID 5/6, multiple drives share a parity drive. If parity drive needed to be accessed for every read as well as write it would become a chokepoint.