Ok your just embarrassing ME now......Well, most of Intel’s chips, even i5s and the like, support hyperthreading (which requires software to support it, or use OpenCL/GrandCentralDispatch). But even most modern single core chips without hyperthreading are capable of executing threads, thanks to the instruction pipeline. As long as a machine code instruction is in some stage of the pipeline, other instructions can be added at different stages (as long as the pipeline isn’t saturated). This is actually one of the traditional differences of CISC based processors (like the 6502, the 68k, and x86) and RISC based processors (like the PowerPC and ARM/Apple Silicon). RISC processors typically have instructions that are all the same size in processor memory, while CISC processors have instructions that may be compound instructions and do differ in size. As a result, RISC machines have historically typically done a better job of fitting more instructions into the instruction pipeline than CISC machines (Intel has tweaked its instruction language to be more RISC like over the Core and i3/5/7/9 era, even while maintaining full compatibility with x86 proper, so it’s not obvious how much of this pipeline advantage actually still exists).
As for the gains of the M1 series over Intel, that’s down to Apple having developed the best performing compute core in the business (performance per watt as well as performance per clock speed unit, an M1 core clocked at the same speeds Intel and AMD are using would likely outperform them in terms of raw benchmark numbers, it seems) and to Apple including a bundle of accelerator hardware at the processor level (GPU for graphics, audio of some sort [of course], video acceleration hardware, Neural Engine for accelerating neural network [think AI] workflows, and I’m pretty sure the Secure Enclave also accelerates crypto functions).
I am by know means any kind of expert in this subject, purely a layman's comment, based on thread title...