Apple chips will use the ARM instruction set with some minor mods. There’s nothing distinct here other than marketing at play. BTW, performance isn’t just about running benchmarks. ARM chipset Apple will leverage is totally unproven. Let’s see how well that can drive high IO bandwidth.
Not sure you quite understand the difference between chip design and instruction set , if i increase my L2 cache , design a better branch predictor , pay area for more ALU`s and a dozens of other
Mircro arch decisions/improvements , you think it wont matter because i comply to the same instruction set ?
If you take 2 years ago Y series Intel x86 chip , which has the same instruction set as Ryzen 3950X , can you compare them in any metric ? you cannot , not core 2 core and not Chip vs Chip , different interconnects , different frequency , different pipelines depth , different HW accelerators , boost schemes , different OOO scheme , different ALU design , different Memory controller implementation , different QoS scheme , different Cache sizes , different Cache inclusion rules , different layout of the chip , different memory latency due to different Fabric topology, different power management design , and many many many more differences ,
but you know what ? they both have the X86-64 instruction set implemented!! so they are basically the same!! Its surprising they are able to dupe the users to buy those Ryzen`s when Intel can match them that easily with a fraction of a price! /s
Regarding "can drive high IO bandwidth" , can you clarify what you mean by that ? which IO specifically you think Intel can drive "well".