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What process node will the M3 use?

  • N4 (4nm), same core design as A16

    Votes: 3 9.1%
  • N3B (first-generation 3nm), new core design originally intended for A16

    Votes: 20 60.6%
  • N3E (second-generation 3nm), same core design as A17

    Votes: 8 24.2%
  • Other, see comment

    Votes: 2 6.1%

  • Total voters
    33

prime17569

macrumors regular
Original poster
May 26, 2021
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So far, Apple's chips have used the following process nodes:

A14/M1 - N5

A15/M2 - N5P

A16 - N4, because TSMC's N3B node was not ready in time

TSMC's N3 nodes are now ready, and there are two nodes at play, N3B and N3E. Nothing I've read has been clear on which node will be used for the M3, though. Will it be based on N4, N3B, or N3E?

If N4, it's probably going to be identical to the A16 in terms of core design, and it's probably not worth upgrading to considering the A16's marginal gains over the A15.

If N3B, it might include the silicon IP that was originally intended for the A16, which means that it would have the new CPU and GPU core design. This would be interesting.

If N3E, it will probably be identical to the A17, but it will probably only come out in 2024 as opposed to this year. This also raises a question: Apple has booked all of TSMC's N3B capacity. If the M3 will be on N3E, then what will Apple be doing with the N3B capacity it booked? Will Apple produce an "A16X" chip for iPads?

What are your thoughts?
 

dmccloud

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Given that current TSMC yields for 3nm wafers are less than 1/3 of 5nm production, I'd wager that the M3 will be based off the A16 cores rather then jumping ahead a generation and switching to 3nm in the process.
 
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prime17569

macrumors regular
Original poster
May 26, 2021
205
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Given that current TSMC yields for 3nm wafers are less than 1/3 of 5nm production, I'd wager that the M3 will be based off the A16 cores rather then jumping ahead a generation and switching to 3nm in the process.
Interesting. It's known that the A17 will be on N3E, though, so this too raises the question of what Apple is going to do with the N3B capacity they booked.
 
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jdb8167

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Nov 17, 2008
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Interesting. It's known that the A17 will be on N3E, though, so this too raises the question of what Apple is going to do with the N3B capacity they booked.
How is it known that A17 will be on N3E exactly? Apple generally starts producing the latest A SoC for the iPhone around the beginning of summer. Is N3E going to be available by then in quantity?
 
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jdb8167

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Given that current TSMC yields for 3nm wafers are less than 1/3 of 5nm production, I'd wager that the M3 will be based off the A16 cores rather then jumping ahead a generation and switching to 3nm in the process.
I thought that analysts were claiming that TSMC was getting 80% yields on their N3B? Have you heard otherwise?
 
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JPack

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Mar 27, 2017
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Base N3, for risk mitigation. And more importantly, timing, if M3 is expected at WWDC.

In all likelihood, M3 is based on A16. Take known IP and apply to new process. A17 is where Apple takes an understood process and marries that with new IP.
 

jdb8167

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Nov 17, 2008
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Base N3, for risk mitigation. And more importantly, timing, if M3 is expected at WWDC.

In all likelihood, M3 is based on A16. Take known IP and apply to new process. A17 is where Apple takes an understood process and marries that with new IP.
A16 is based on N4P not N3B or N3E. If Apple has to use a new design for N3, why would they use an older architecture instead of A17 which has to be completed at this point? If M3 was going to be based on N4P then it would make sense to use the A16 architecture.
 

JPack

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Mar 27, 2017
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A16 is based on N4P not N3B or N3E. If Apple has to use a new design for N3, why would they use an older architecture instead of A17 which has to be completed at this point? If M3 was going to be based on N4P then it would make sense to use the A16 architecture.

Like I said, risk mitigation. There's a reason why there is "Tick Tock." It's less risky to carry over existing IP to a new process rather than apply a new process along with new IP. It's not romantic, just like how we saw M1 launch with all existing chassis designs.

A17 wasn't likely done with design when Apple started working on M3. The M-series processors are an extension of the A-series. This means it takes time, not just for A17 to be completed, but additional time to design and verify a more complex M3 chip.
 

jdb8167

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Nov 17, 2008
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Like I said, risk mitigation. There's a reason why there is "Tick Tock." It's less risky to carry over existing IP to a new process rather than apply a new process along with new IP. It's not romantic, just like how we saw M1 launch with all existing chassis designs.

A17 wasn't likely done with design when Apple started working on M3. The M-series processors are an extension of the A-series. This means it takes time, not just for A17 to be completed, but additional time to design and verify a more complex M3 chip.
How do you know the A17 design wasn't done simultaneously with the M3 design? The A16 was based on a N5 node and would require a redesign to work with an N3 node. If you are going to do a redesign, why would you base it on a previous architecture when you already know that the A17 also needs to be completed in the same time range as the M3. A17 will start production in the early summer for release in the fall. It seems likely that the M3 will be released sometime in late spring (WWDC?). Tick-Tock doesn't work when there is only a couple of months between the tick and tock.
 

JPack

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Mar 27, 2017
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How do you know the A17 design wasn't done simultaneously with the M3 design? The A16 was based on a N5 node and would require a redesign to work with an N3 node. If you are going to do a redesign, why would you base it on a previous architecture when you already know that the A17 also needs to be completed in the same time range as the M3. A17 will start production in the early summer for release in the fall. It seems likely that the M3 will be released sometime in late spring (WWDC?). Tick-Tock doesn't work when there is only a couple of months between the tick and tock.

Risk mitigation. What percentage of revenue comes from iPhone? As a project manager, you’re not going to spread yourself thin and split engineering resources between A17 and M3 when one is “do or die” and the other is a ”nice to have.”
 

prime17569

macrumors regular
Original poster
May 26, 2021
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Like I said, risk mitigation. There's a reason why there is "Tick Tock." It's less risky to carry over existing IP to a new process rather than apply a new process along with new IP. It's not romantic, just like how we saw M1 launch with all existing chassis designs.

A17 wasn't likely done with design when Apple started working on M3. The M-series processors are an extension of the A-series. This means it takes time, not just for A17 to be completed, but additional time to design and verify a more complex M3 chip.

It’s also worth noting that the A16 that made it into the iPhone 14 Pro series likely isn’t the A16 that Apple originally was planning to make; earlier reports [1] suggest that the A16 was slated to have a new GPU with ray tracing support, but the new design was scrapped at the last minute due to power and thermal concerns. Additionally, an analysis from High Yield on YouTube [2] shows that the A16 CPU cores are extremely similar to the A15, with the speed boost (<10%) being almost entirely due to the process change from N5P to N4 (which is so similar to N5P that it can be produced by the same machines). These changes were most likely due to TSMC’s N3B node being delayed too late for A16 to use it, and it was probably not possible for Apple to ”backport” the new IP to N4 without hitting thermal and wafer size constraints. Therefore, if the M3 is to be based on N3B like you said, it will probably not have the A16 IP we saw (that’s practically identical to that of the A15) but instead the new IP that was delayed.

[1] https://www.macrumors.com/2022/12/23/iphone-14-pro-setback-removed-graphics-processor/
[2]
 

jdb8167

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Nov 17, 2008
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Risk mitigation. What percentage of revenue comes from iPhone? As a project manager, you’re not going to spread yourself thin and split engineering resources between A17 and M3 when one is “do or die” and the other is a ”nice to have.”
You seem to have it backwards. The A17 has to work and has to be released sometime around September 2023. So its design is going to be a known quantity. Since the A17 design is a known quantity, the risk would be designing a different microarchitecture for the M3 based on the A16 when you have a perfectly good A17 N3 design that already exists.
 

JPack

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Mar 27, 2017
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You seem to have it backwards. The A17 has to work and has to be released sometime around September 2023. So its design is going to be a known quantity. Since the A17 design is a known quantity, the risk would be designing a different microarchitecture for the M3 based on the A16 when you have a perfectly good A17 N3 design that already exists.

New IP + new process is higher risk than existing design + new process.

I'm not sure how you can possibly twist it another way.

Applying N3B to A16 IP is not a "different uarchitecture."
 
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dmccloud

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I thought that analysts were claiming that TSMC was getting 80% yields on their N3B? Have you heard otherwise?

Right now, 3nm wafer production is only around 45,000 wafers/month. Current 5nm production is at ~195,000/month. So regardless of the percentages of usable chips, there's significantly fewer wafers being made, which translates into fewer chips overall.
 
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jdb8167

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Nov 17, 2008
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Right now, 3nm wafer production is only around 45,000 wafers/month. Current 5nm production is at ~195,000/month. So regardless of the percentages of usable chips, there's significantly fewer wafers being made, which translates into fewer chips overall.
That makes sense but I don't think most people would refer to that as yield but more just manufacturing output.
 

jdb8167

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Nov 17, 2008
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New IP + new process is higher risk than existing design + new process.

I'm not sure how you can possibly twist it another way.

Applying N3B to A16 IP is not a "different uarchitecture."
Probably not a completely new microarchitecture but the N3 node is not going to use the same design rules as the N5 nodes.
 

JPack

macrumors G5
Mar 27, 2017
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Probably not a completely new microarchitecture but the N3 node is not going to use the same design rules as the N5 nodes.

Once again, existing cores + new process is less risky. Nobody said N3 uses the same rules as N5.

Your premise is based on "A17 design is a known quantity." The problem is, it isn't. My whole point is, A17 like any other project, involves risks. To meet a September 2023 deadline, Apple engineers need to decide what features they can implement within that time frame. Once those core features are implemented, then work on M-series can begin.
 

JPack

macrumors G5
Mar 27, 2017
13,172
25,287
It’s also worth noting that the A16 that made it into the iPhone 14 Pro series likely isn’t the A16 that Apple originally was planning to make; earlier reports [1] suggest that the A16 was slated to have a new GPU with ray tracing support, but the new design was scrapped at the last minute due to power and thermal concerns. Additionally, an analysis from High Yield on YouTube [2] shows that the A16 CPU cores are extremely similar to the A15, with the speed boost (<10%) being almost entirely due to the process change from N5P to N4 (which is so similar to N5P that it can be produced by the same machines). These changes were most likely due to TSMC’s N3B node being delayed too late for A16 to use it, and it was probably not possible for Apple to ”backport” the new IP to N4 without hitting thermal and wafer size constraints. Therefore, if the M3 is to be based on N3B like you said, it will probably not have the A16 IP we saw (that’s practically identical to that of the A15) but instead the new IP that was delayed.

[1] https://www.macrumors.com/2022/12/23/iphone-14-pro-setback-removed-graphics-processor/
[2]

It's entirely unclear from the report whether the power consumption was related to design problems or litho constraints.

I don't see how you can jump from "A16 lacks ray tracing," to "therefore M3 will not use A16 IP." Is it because you believe Apple must have successfully implemented ray tracing by now?
 

prime17569

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Original poster
May 26, 2021
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It's entirely unclear from the report whether the power consumption was related to design problems or litho constraints.

I don't see how you can jump from "A16 lacks ray tracing," to "therefore M3 will not use A16 IP." Is it because you believe Apple must have successfully implemented ray tracing by now?
I would hope so, considering that the new CPU/GPU core design should have had a few more months to bake in the oven at this point. I don't think they would abandon it outright.
 

JPack

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Mar 27, 2017
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A16 - N4, because TSMC's N3B node was not ready in time

Keep in mind N4 was announced in 2020 with HV production scheduled for 2022. This was always more concrete than the N3 schedule. Other than hope, there hasn't been any evidence A16 was designed for N3 in the first place.
 

prime17569

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May 26, 2021
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Keep in mind N4 was announced in 2020 with HV production scheduled for 2022. This was always more concrete than the N3 schedule. Other than hope, there hasn't been any evidence A16 was designed for N3 in the first place.

True, but it's rather strange how marginal the performance gains were compared to A15. Even Apple didn't want to make too many comparisons in their fall event. If it was designed with N4 in mind from the start then more optimizations would be expected. Either that or they are really bumping up against the limits of the 5nm/4nm-class nodes with regards to performance per watt (i.e. they can't eke out any more performance without making the chip less efficient and decreasing battery life).
 
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Boil

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Initial M3-series of SoCs will be based on the A17 cores, will utilize the N3B process, and will introduce hardware ray-tracing; these will be Ultra & Extreme SoCs (or whatever derivative Apple decides to go with) intended for use in the Spring 2023 release of the ASi Mac Pro...
 
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