The link pretty clearly says the die size for those RAM chips is 16GB each. Doesn't that mean they can get up to 32GB on board in the SoC package?
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Will Mac SoC include the memory in the SoC?
- Thread starter burgerrecords
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Thinness doesn’t matter for this purpose, but cooling sure does. That’s why my “invention” relied on diamond interposers to spread heat. In any event, i’m sure if they did it that it;’s side-by-side. This is old technology (the CPU I designed and built in the 1990s and which is referred to in that dissertation did that.). We just used to call them “multi-chip modules,” but now everyone has their own fancy names for these things.I could be misinterpreting but if you read the quoted link
The Packaging of Apple’s A12X is… Weird | Siliconica
sst.semiconductor-digest.com
it implies the DRAM packages are 16GB dies so Apple could already do 32GB "on-board" at least as far as their SoC packaging is concerned, as far back as 2018. Don't forget they've likely been working on the Mac SoCs for longer than everyone is assuming.
I'm guessing they are side by side for thinness and cooling purposes. Might not be an issue in a Mac but not necessarily worth the gains to build two different packages.
The article is stating they are 16 Gbit RAM packages. It's common for DRAM package density to be described in bits rather than bytes.
So these 16 Gbit packages are 2 Gbyte of LPDDR4 DRAM. 2 packages adjacent to the A12X SoC equates to 4 GByte of RAM. The 6 GB iPad Pro models would then have 24 Gbit DRAM packages for 3 GB x 2 packages for 6 GBytes of RAM.
Since there are 8 GByte LPDDR4X packages available, it's not a stretch to say that all Apple did for the DTK was replace the 3 Gbyte DRAM packages, they would be adjacent to the SoC as shown in the article, with 2 8-GByte DRAM packages for a total of 16 Gbyte, and then called it a day for the DTK, other than adding HDMI, USB and Ethernet controllers.
For the real Mac Apple Silicon, LPDDR5 16 GByte packages are either in production or sampling right now, an A12X/Z like SoC package design with 2 DRAM packages can have up to 32 GByte of RAM.
Want more? Add 2 more LPDDR5 packages adjacent to the SoC on the other side and 64 Gbyte is possible. Want even more? there are 4 sides to a chip. Or, Apple can use a variety of DRAM stacking techniques. Eg, a 2 layer wafer fan-out stacking consisting of 4 stacks means 8 16-Gbyte LPDRR5 packages gets them 128 GByte of RAM, with the SoC package maybe being 2x as large as the A12Z package.
It isn't on the iPad the way that it is on the iPhone and iPod touch. So, I'd assume that it won't be integrated onto the SoC. It will still likely not be user-replaceable on notebooks and still be integrated onto the logic board. I'm not sure enough about whether or not the Mac mini, 27" iMac, and Mac Pro will have replacable/removable RAM. I'd be shocked if the Mac Pro didn't. I'd say that an Apple Silicon 24" iMac, especially if it's meant to be a replacement to the Intel 21.5" iMac, will probably not have removable RAM. But that's the best I can predict at this point.
This is essentially what I am expecting. They will use 2 x 8 GByte packages in socket for the base and 2 x 16 Gbyte for the 32GB models. They keep the same basic design and benefit from the speed bump resulting from there being basically no distance between the RAM and the SoC.
It does not say 16GB each. It says that Apple is using 16Gb chips. Small b ( bits not bytes ). There is a huge difference.
There are no 16-32GB chips ( i.e., 125-256Gb ) . There isn't going to be any "real soon now " either.
"...
SK Hynix has been working diligently on perfecting its DDR5 chips with capacity for up to 64 Gb per chip. ..."
SK Hynix: We're Planning for DDR5-8400 at 1.1 Volts
"... DDR5 will allow for individual memory chips up to 64Gbit in density, which is 4x higher than DDR4’s 16Gbit density maximum ..."
No. With a 16Gb max density that means can get to 32Gb max with two plain, standard packages. To stretch to the 16GB of the DTK they would need two non standard packages with dies stacked 4 high ( 8 x16 = 128Gb = 16GB )
but that would be quite odd. Samsung has some two die packages that get to 32Gb is a custom package.
https://www.anandtech.com/show/14341/samsung-samples-32-gb-ddr4-memory-chips
The vast majority of Macs won't be as space constrained as the iPad Pro. A multichip module that could handle 4 DRAM packages could go up to 16GB with 32Gbit packages . That is probably sufficient for the entry level laptops. Once DDR5 goes mainstream in the future, that would creep up to a 32GB max without resorting to non standard gyrations. Again decent for laptops.
Desktop wise though it would be quite problematical to get to triple digit RAM capacities with that kind of an artificial cap ( 2 - 4 DRAM packages ). To say nothing about the substantive price increase with pushing into the max density tech available ( and Apple's mark up piled on top of that ).
Apple consistently solders the RAM on the laptops now so going to a larger package with the RAM soldered in also isn't a major move. Especially if the CPU die isn't going to get relatively much warmer than the DRAM packages.
Mac desktops generally don't ( even if access to the DIMMs are limited there are usually still there). If go for large capacity at affordable prices soldering the RAM isn't board space efficient ( unless z-height is expensive. "paying for thin"). At the desktop level also though if the CPU die is much further away from the cooling envelope of the DRAM packages it doesn't makes sense to tightly couple two radically different thermal envelopes ( .e.g, Mac Pro 2013 and CPU and GPU thermal gaps. It would be the a very similar "painting yourself into a corner" problem. )
Extremely close DRAM packages on a MCM and then some other DRAM on logic board with much different trace lengths is also a "paint yourself into a corner" problem ( just with timing. )
I really don't need my mistake pointing out more than once. And I do know the difference, I'm simply not accustomed to using bits for RAM.