AMD Discussion

[koyoot]

https://www.semiaccurate.com/2018/10/29/more-details-about-amds-rome-cpu-leak/

In our initial reveal we said there were 9 die or more specifically 8+1 dies with 8x 8-core CCXs and one IOX

 

[koyoot]

https://www.anandtech.com/show/13538/amd-investor-relations-next-horizon-november-6th

 

[cube]

Does this mean the X4 is better at DX12 and Vulkan?

It seems to get bogged down by simulation.

 

[cube]

GIGABYTE has E-ATX and ATX single socket EPYC motherboards.

E-ATX supports two sticks per channel, but it would fit short PCIe cards mostly.

 

[cube]

I wonder if the load measurement tool considers both cores in an Excavator module active when the FP unit is in use, and that is why that test seems to extract more performance out of the X4 under DX12.

 

[cube]

What is happening with the X4 and Odyssey?

 

[cube]

The 200GE finally dropped to MSRP in the US.

 

[koyoot]

Cascade Lake is a laugh. 360W TDP, 48C/48T. It will be simply trounced by 64C/128T, 225-250W TDP CPU, which also - will be cheaper to buy.

 

[cube]

Let's see what AMD does with AVX-512. That sells supercomputers.

 

[koyoot]

From current rumors: IPC of Zen2 is higher than expected. Clocks are higher than expected, AVX performance improved, however - we will not get AVX 512, at this moment, focus on improving memory latency, much more refined Frequency stepping.

Imagine this: 8C/16T Ryzen 5 3500X, with 4.4/5.0 GHz base/Turbo clocks, that costs under 199$.

This would completely MURDER Intel on Mainstream platform.

65W CPUs will offer 4.5 GHz-4.7 GHz Turbo, on 8C/16T. Current rumor is that Zen2 CPUs will START with 8C/8T Ryzen 3 3200.

 

[cube]

I was hoping to at least get 1-cycle AVX2 and 2-cycle AVX-512 with Zen 2. Wishing that AMD would implement the whole of 512.

 

[koyoot]

https://twitter.com/CDemerjian/status/1059864890469343232

Aaand AMD is murdering Intel right now .

I love this <3

Quick Zen2 summary:
- new L1I
- better ifetch, data prefetch, branch prediction
- bigger uop cache
- 256b L1D ports
- 4x256b FPU EUs
- 3 new instructions: CLWB, RDPID, WBNOINVD
- 7nm core, 14nm IO

 

[cube]

I was expecting the 256-bit execution units. It is a pity if Zen 2 will not have 2-cycle AVX-512.

 

[koyoot]

 

[cube]

Now they just need to make an I/O chiplet for DDR3.

 

[koyoot]

Now they just need to make an I/O chiplet for DDR3.

What the f*** for?

 

[cube]

What the f*** for?

AM3+ upgrade.

 

[koyoot]

AM3+ upgrade.

Not going to happen.

 

[cube]

Not going to happen.

Well, people are still buying AM3+ CPUs and motherboards.

Phenom II to Piledriver is not a real upgrade.

8-core Zen 2 on AM3+ would be nice.

 

[koyoot]

Well, people are still buying AM3+ CPUs and motherboards.

Phenom II to Piledriver is not a real upgrade.

8-core Zen 2 on AM3+ would be nice.

Buy new MoBo.

 

[cube]

Buy new MoBo.

I already bought an AM3+ motherboard and DDR3 when the AM2+ one died and still have the Phenom II X6 because Piledriver is not worth it.

 

[koyoot]

Holy smokes...

I already bought an AM3+ motherboard and DDR3 when the AM2+ one died and still have the Phenom II X6 because Piledriver is not worth it.

If you want Zen - buy AM4.

 

[cube]

If you want Zen - buy AM4.

I want a real AM3+ upgrade, not Zen.

I don't care if it is just 22FDX Excavator.

I have another AM2+ computer with a Phenom X3.

Then I could just buy a new CPU for the AM3+ and move the Phenom II X6 to the AM2+.

 

[koyoot]

Estimated increase in IPC is based on AMD internal testing for “Zen 2” across microbenchmarks, measured at 4.53 IPC for DKERN +RSA compared to prior “Zen 1” generation CPU (measured at 3.5 IPC for DKERN + RSA) using combined floating point and integer benchmarks

28% IPC increase? O_O

 

[koyoot]