I'm late to the thread, but in addition to having stayed in a Holdiay Inn last night, I've also done work with embedded systems that had direct interfaces to NAND chips.
One thing that hasn't been mentioned here yet, is that the lifespan of a NAND flash chip (in terms of writes) is directly related to the process used to make the NAND chip (size of the cells) and the number of bits per cell stored.
In short - the early SSDs - like the Intel 120GB used 50nm NAND flash and came in 1 and 2-bit per cell varieties. each block on the NAND chip was rated to be re-written 50,000 or even 100,000 times, before statistically you get enough bad cells for the SSD to fail.
More recent NAND chips hold a LOT more data by virtue of much smaller cells - 16nm and 20nm, 3D vertical stacking, and storing more bits per cell (3 or 4). They are also rated for (usually) around 3,000 to 5,000 re-writes. This had allowed SSD prices to come WAAAY down, and why we're not paying $2000 for a 1TB SSD.
The downside is longevity. To some extent, it's been offset by smart algorithms that spread the writes around evenly (wear leveling), and newer filesystems being more optimized for SSD life, but byte-per-byte, you don't get as many writes as you used to.
I skipped a lot about NAND that I could talk about, because the above is the important thing to understand.
Ideally, Apple has kept the SSD part on a separate card, even if the T2 chip is the controller, though given that they have soldered it on the logic boards in their laptops there is precedent there. Even if it's not a standard M.2 card, there's hope that OWC or someone will be able to get compatible SSDs to market like they did for the 2014 Mini. As long as a "blank" SSD can be initialized to work the the T2 we will be ok.
The difference between 128GB and 2TB is 16x - much bigger than any laptop or previous Mini, and I think the demand for an upgrade solution will be there.
[doublepost=1541204888][/doublepost]Ok, for those of you like this sort of thing, *THIS* is interesting reading.
https://www.apple.com/mac/docs/Apple_T2_Security_Chip_Overview.pdf
It's similar to some ( simpler ) stuff I've worked with in the embedded space. What's interesting is that there are zero details on the NAND flash controller. Looking at what's there, it possible the T2 chip is the interface .. ie. it sits between, the system bus and the actual NVMe controller. And that makes sense, as making an NVMe SSD controller is a difficult and big, expensive thing.. and making one as fast as the current kings of the hill (Samsung, WD's top controllers) means investing enough to go toe-to-toe with those companies in the storage market.
By sitting in the middle, it can do all the encryption and decryption in a secure way, without having to the the nuts and bolts of the actual reading/writing (and that would also mean the block reordering, wear leveling, etc).
but then.. Apple could afford to go all in on that, and it doesn't preclude a separate controller chip on the mainboard, but the way things have been said, that doesn't seem as likely.
