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[CPU only] Apple M1/2(Max/Ultra) (TSMC 5nm) vs AMD Zen 4 (TSMC 5nm) - Technical Analysis
- Thread starter exoticSpice
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I mean not the suite itself but how some posters use it here. They cherry pick results that make Apple hardware look bad. I am also not claiming that the benchmark tool is obscure. Like have you ever heard about the "appleseed" renderer? Neither have I.
They use outdated versions of softwares too, for example in their test they run x265 3.4 which has almost no NEON asm code, instead of the latest version.
The same is true for others, many open-source software are still lacking any kind of optimization, but they are slowly coming together: for example the FLAC encoder has been recently optimized for aarch64, FFmpeg is slowly adding some aarch64 optimized routine, etc…
Performance on a wide range of software can only get better.
The same is true for others, many open-source software are still lacking any kind of optimization, but they are slowly coming together: for example the FLAC encoder has been recently optimized for aarch64, FFmpeg is slowly adding some aarch64 optimized routine, etc…
Performance on a wide range of software can only get better.
Geekbench uses a collection of real-world workloads, it's not the same as synthetic benchmarks of old. Different tests will obviously have different characteristics. You can find the precise description of the tests here:
With the caveat that the results for M1 will obviously look very different.
If it's the same, why not use Clang? Isn't Clang available for macOS? Why choose a proprietary solution over an open source one?
Doesn't Xcode use Apple's fork of LLVM? Isn't Apple's fork more optimized for Apple hardware than vanilla LLVM?
Xcode is an IDE that uses clang. I mean, I agree with you that using the separately complied LLVM toolchain would make more sense for a benchmark but maybe there are some issues building GUI apps with the external LLVM toolchain, not sure.
Apple's fork of LLVM just includes some additional debugging features from what I understand.
It would be very ironic if a compiler in which Apple has invested so much could not now compile all applications for macOS , but could compile for Windows.
All of you are off. He covers unix and is hardware agnostic so has covered not only Linux, BSD, OpenSolaris, etc. but also MacOS for over a decade. He even throws in some Windows vs Linux comparisons. Obviously, if one is looking for just Geekbench results and how to figure out one-click installer for Stable Diffusion then it's not for you.
https://www.phoronix.com/review/ubuntu_karmic_leopard
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Compiling is not a problem. Linking and making application bundles might be a different thing. To be honest I've never tried building a full Xcode app using external LLVM toolchain...
Apple's LLVM fork seems to be vanilla LLVM + Swift support. So, Apple's clang and LLVM clang could be the same.
llvm-project/apple-docs/AppleBranchingScheme.md at apple/main · swiftlang/llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. This fork is used to manage Swift’s stable releases of Clang as well as support the Swift project. - s...
github.com
What do you mean with "could"? You can use CLANG/LLVM to actually compile for Windows, both x64 and ARM64. In addition there is clang-cl as a direct drop-in-replacement for the Microsoft Visual Studio compiler (aka cl.exe).
The problem is not "obscurity", the problem is that Phoronix seems set up to win cherry-picking d**k-measuring contests, not to understand. Michael seems to have zero interest in understanding when massive discrepancies between results arise from eg a particular library doing specific things (this happens a lot with any code involving random numbers because some libraries appear to use different RNGs with very different guarantees) or in whether different paths hit assembly or not (even cases where this is dumb, like the test for assembly uses macros specific to a compiler or OS rather that more correct generic macros.)
Phoronix is hardly alone in this! Andrei F was pretty much the only benchmarker who ever tried to LEARN from benchmarks. Chips and Cheese may one day get there, unclear right now. Likewise for Geekerwan.
But Phoronix seems especially oblivious to *any* sort of concerns about rigor. For example there are no attempts to segregate benchmarks into clusters like "known to depend strongly on assembly" or "known to have problems with the library". Hell, you don't even know the thermal conditions at and between runs.
GB5 has its problems, but John at least tries hard to identify these sorts of issues and fix them as they are encountered.
There is even one more important point when trying to compare efficiency - that is the requirement of running the CPUs at the same voltage. In ECO mode 64 (88 W PPT) we are looking at 0.866V for Zen 4. Unfortunately we do not know the voltage used of M1, but I do expect it at least 1.0V or something in this range. If we are unable to reduce M1 voltage when doing power measurements, we at least need to take an additional efficiency factor of (1.0/0.866)^2 = 1.33 (33%) into consideration.
Because efficiency is only dependent on voltage for a given architecture. In fact efficiency is linear to the inverse of voltage squared.
I think you might be trying to solve a problem which simply isn’t feasible. It would be great if one could get these CPUs in a controlled test environment where one can manipulate all the relevant variables and study the behavior of the chip. But we simply don’t have this luxury. For the basic purpose the efficiency “as configured” would be already useful information, but it seems we can’t even get that.
Besides, how is it that’s it’s only dependent on voltage? What about current?
As I said, you can just use a factor. Current is implicit in the calculation. To be more precise:
efficiency = performance / power = (C0 *f) / (C1 * V^2 * f) = C0 /C1 * (1/V)^2 - this holds for any digital circuit.
C0 is a performance constant, which is fixed per architecture and benchmark (think about it as linear to IPC)
C1 is a power constant, which is fixed per architecture and benchmark (think about it as the energy per cycle, but it really is a capacitance per cycle)
Hence the only factor, which is not dependent on architecture and benchmark is (1/V)^2, which is very relevant as it goes square into the equation.
What we really want to know is C0/C1 - so we have to do iso-voltage measurements - or just use an equalisation factor.
ps: voltage is the only reason, why 88W mode is more efficient than the 142W mode, which is more efficient than the 230W mode. Note that frequency cancels out in the equations. You have the very same voltage dependency for M1s efficiency.
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I disagree. What you're suggesting addresses a different question from the one being raised here. Here we're simply asking about the efficiency of the M1 vs. Zen 4/Eco Mode, i.e., the relative efficiencies available to consumers in normal use.
If you're talking about adjusting the voltage of the M1, you're asking an entirely different question that opens up an entirely new can of worms. First, just to start, you'd need benchmark measurements for the M1 at the lower voltage, which we don't have. I.e., you can't just consider the 33% power reduction you'd get by reducing the M1's voltage without also accounting for the reduction in performance you'd get.
Further, once you started deviating from mfr-specified voltages you can't just look at two voltages. Rather, you'd need to look at efficiency vs. voltage curves for both processors, and find the most efficient point at which each operated stably. But then the performance at those points might be too low to be desirable. Etc., etc...