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DP/USB-C/Thunderbolt 3/4 to HDMI 2.1 4k@120hz RGB4:4:4 10b HDR with Apple Silicon M1/M2/M3 now possible !
- Thread starter Zorast
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Ok nice, I will update the op with that. So now we have 2 Docks that works.
Just confirming the CableMatters 201388(GRY) works with the ThinkPad Universal Thunderbolt 4 Dock 40B00135AU, 3840x2160p@120hz RGB 10b 4L10.
Hello. Came to thank 
Macbook pro 16 m1 pro + LG C2 42 now I get 120hz 10bit. I used a wire with a chip VMM7100. Updated to the latest version and everything works fine. Sound works the same. I bought the cable on ali, I'll attach the link. Thanks again for your help.
Macbook pro 16 m1 pro + LG C2 42 now I get 120hz 10bit. I used a wire with a chip VMM7100. Updated to the latest version and everything works fine. Sound works the same. I bought the cable on ali, I'll attach the link. Thanks again for your help. 
Confirming that the Belkin Thunderbolt 3 Express Dock HD, F4U095 does NOT allow for 4k 120 :/
Capped at 4k 60 for both TB3 and DP which apparently it's only 1.2
Going to figure out a different docking solution, probably the CalDigit TS4 Thunderbolt 4 Dock
Capped at 4k 60 for both TB3 and DP which apparently it's only 1.2
Going to figure out a different docking solution, probably the CalDigit TS4 Thunderbolt 4 Dock
How can I find the Cable Matters 201388-A with the VMM7100 chip? On Amazon, the product number says 201388-GRY 😔
Cable Matters 48 Gbps Adaptador USB C a HDMI 2.1 (Adaptador HDMI USB C) para 4K 120Hz/8K 60Hz HDR - Compatible con Puertos USB4 y Thunderbolt 4/3-Resolución máxima admitida en Cualquier Mac es 4K@60Hz
Cable Matters 201388-GRY HDMI cable
www.amazon.es
I remember reading thru all the thread that they no longer make the VMM6100 version, and the new version ships even tho the model in amazon is different, but you could ask them directly thru amazon to sell you the new oneHow can I find the Cable Matters 201388-A with the VMM7100 chip? On Amazon, the product number says 201388-GRY 😔
Cable Matters 48 Gbps Adaptador USB C a HDMI 2.1 (Adaptador HDMI USB C) para 4K 120Hz/8K 60Hz HDR - Compatible con Puertos USB4 y Thunderbolt 4/3-Resolución máxima admitida en Cualquier Mac es 4K@60Hz
Cable Matters 201388-GRY HDMI cablewww.amazon.es
Same here in Canada Store but they said there was an error in product description on Amazon. Expecting my package any minute now, would inform you the model that I received 👍How can I find the Cable Matters 201388-A with the VMM7100 chip? On Amazon, the product number says 201388-GRY 😔
Cable Matters 48 Gbps Adaptador USB C a HDMI 2.1 (Adaptador HDMI USB C) para 4K 120Hz/8K 60Hz HDR - Compatible con Puertos USB4 y Thunderbolt 4/3-Resolución máxima admitida en Cualquier Mac es 4K@60Hz
Cable Matters 201388-GRY HDMI cablewww.amazon.es
I can confirm 4K@120Hz RBG 10Bit working on M1 Mac mini with Cable Matters 201388-GRY and Lenovo Thunderbolt 3 Gen 2 Dock (40AN):
I had to add UHDTV (16:9) 120Hz to my Video Data Block in AW EDID Editor. Expecting my order of Cable Matters DP > HDMI 2.1 (102101) to arrive on Saturday for a one-cable solution with this dock.
Somehow, the Dock (with firmware 3.1.82) has an added benefit of turning off its display connection when the system is going to sleep and reconnecting upon wake. This makes my TV switch input to my Mac mini on wake and could theoretically wake TV from sleep if your TV supports Wake on Signal like Sony's Pro-Settings implementation here.
Also, pressing the Dock button when connected to the Mac mini turns off all the lights on the Dock. Weirdly enough this doesn't happen on Windows and even the ThinkPad Universal USB-C Dock.
Sadly I have the Sony X85J with an unusable implementation of 4K@120Hz which sucks tbh 🥲
Thank you for providing this post!
I had to add UHDTV (16:9) 120Hz to my Video Data Block in AW EDID Editor. Expecting my order of Cable Matters DP > HDMI 2.1 (102101) to arrive on Saturday for a one-cable solution with this dock.
Somehow, the Dock (with firmware 3.1.82) has an added benefit of turning off its display connection when the system is going to sleep and reconnecting upon wake. This makes my TV switch input to my Mac mini on wake and could theoretically wake TV from sleep if your TV supports Wake on Signal like Sony's Pro-Settings implementation here.
Also, pressing the Dock button when connected to the Mac mini turns off all the lights on the Dock. Weirdly enough this doesn't happen on Windows and even the ThinkPad Universal USB-C Dock.
Sadly I have the Sony X85J with an unusable implementation of 4K@120Hz which sucks tbh 🥲
Thank you for providing this post!
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Got the 102101-BLK DP > HDMI 2.1 Adapter and for some reason, it seems to work after only editing EDID without firmware update (as I don't have a Windows PC with full-sized DisplayPort near me to flash firmware).
Another weird thing is that I was only able to get this configuration with my Lenovo ThinkPad Universal USB-C Dock. The DisplayPorts on Lenovo Thunderbolt 3 Gen 2 dock didn't recognize it (at least with the stock un-updated firmware).
After some research (and confirmation from VmmDPTool on Windows), seems the USB-C dock uses the same VMM5322 Chip from Synaptics as the Thunderbolt and supports DP 1.4 with DSC (probably the only reason why it works). But it's still very weird that it worked with USB-C protocol and not Thunderbolt. The Thunderbolt dock however did work with flashed 201388-GRY USB-C > HDMI 2.1 on its TB downstream port.
I am super confused as to what is going on here as I've read USB-C Docks were not known to work 🫠
Update
The Thunderbolt Dock DisplayPort works with YCbCr instead of RGB after enable YCbCr in EDID (its TB downstream port connected to 201388-GRY displays RGB). The USB-C Dock DisplayPort connected to 102101-BLK however does display with RBG.
Another weird thing is that I was only able to get this configuration with my Lenovo ThinkPad Universal USB-C Dock. The DisplayPorts on Lenovo Thunderbolt 3 Gen 2 dock didn't recognize it (at least with the stock un-updated firmware).
After some research (and confirmation from VmmDPTool on Windows), seems the USB-C dock uses the same VMM5322 Chip from Synaptics as the Thunderbolt and supports DP 1.4 with DSC (probably the only reason why it works). But it's still very weird that it worked with USB-C protocol and not Thunderbolt. The Thunderbolt dock however did work with flashed 201388-GRY USB-C > HDMI 2.1 on its TB downstream port.
I am super confused as to what is going on here as I've read USB-C Docks were not known to work 🫠
Update
The Thunderbolt Dock DisplayPort works with YCbCr instead of RGB after enable YCbCr in EDID (its TB downstream port connected to 201388-GRY displays RGB). The USB-C Dock DisplayPort connected to 102101-BLK however does display with RBG.
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Oi, thanks for the comments about the dock, I've been looking for one lately, I'll add it to my wishlist
Without the right Firmware u can not reach 4:4:4 on 4k@120hz or more
This miracle is not the same case for Dell WD19S USB-C Dock + Cable Matters 102101-BLK. There is no option for 120Hz or anything above 60Hz at 4K after changing EDID without flashing VMM7100 firmware. I can't test with flashing as I don't have full-sized DP1.4 Windows PC.
Saw some comments about Dell's implementation of DP1.4 + DSC as not being standard and the dock uses Synaptics VMM5331 MST Hub, not sure if this information matters to someone out there.
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Can confirm without surprise, Henge/Brydge Stone Pro Thunderbolt 3 Dock doesn't work with either adapter. Dock has DP 1.2
Well that's it from me, returned products to Amazon and looking forward to a better 120Hz display.
Well that's it from me, returned products to Amazon and looking forward to a better 120Hz display.
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A USB-C dock probably has 2 lanes of DisplayPort instead of 4 but that still should be enough for 4K120 with DSC or 4:2:0 (with CVT-RB2 timing instead of HDMI timing).
An MST hub might not support DSC decompression for 10 bpc but maybe it can pass the DSC to an adapter or display.
DP 1.2 might not support 4:2:0 or DSC. I'm not sure if a DP 1.2 limited Thunderbolt dock can pass DSC or 4:2:0 from a DP 1.4 host.
Connect the dock and adapters and display to an Intel Mac. Then use AllRez to decode the DPCD to check the capabilities of the MST hub and adapter and display.
An MST hub might not support DSC decompression for 10 bpc but maybe it can pass the DSC to an adapter or display.
DP 1.2 might not support 4:2:0 or DSC. I'm not sure if a DP 1.2 limited Thunderbolt dock can pass DSC or 4:2:0 from a DP 1.4 host.
Connect the dock and adapters and display to an Intel Mac. Then use AllRez to decode the DPCD to check the capabilities of the MST hub and adapter and display.
Found this for 2017 Intel MacBook with Radeon GPU + Lenovo USB-C Dock 40AY + Cable Matters 102101-BLK + Sony X85J:
Code:
I2C Interfaces = {
[0] = {
IOFBCopyI2CInterfaceForBus = { id:0x400000000 busType:DisplayPort transactionTypes:(No,Simple,DDCci,Combined,DisplayPort,) commFlags:(UseSubAddress,) };
EDID from E-DDC (old method) = 00ffffffffffff004dd905c101010101011f0103805f36780a0dc9a05747982712484c2108008180a9c0714fb3000101010101010101b8ce0050f0705a8018108a00b8173200001e023a801871382d40582c4500b8173200001e000000fc00534f4e5920545620202a33300a000000fd0017790e883c000a2020202020200111020361f05a7576616065665d5e5f621f101405130420223c3e120311023f402f0d7f071507503d07bc570601670403830f00006e030c00400098442b0080010203046dd85dc401788001030000000000e200cbe305df01e20f3fe6060d01828220011d007251d01e206e285500b8173200001e000000000000000000000000a2
EDID from E-DDC = 00ffffffffffff004dd905c101010101011f0103805f36780a0dc9a05747982712484c2108008180a9c0714fb3000101010101010101b8ce0050f0705a8018108a00b8173200001e023a801871382d40582c4500b8173200001e000000fc00534f4e5920545620202a33300a000000fd0017790e883c000a2020202020200111020361f05a7576616065665d5e5f621f101405130420223c3e120311023f402f0d7f071507503d07bc570601670403830f00006e030c00400098442b0080010203046dd85dc401788001030000000000e200cbe305df01e20f3fe6060d01828220011d007251d01e206e285500b8173200001e000000000000000000000000a2
Timing Report = { (unexpected data: 000000000000000000) };
VCP Capabilities = {
(unexpected data at offset 0: 0000000000000000000000000000000000000000000000000000000000000000000000000000),
}; // VCP Capabilities
DisplayPort = {
dpcd = {
00000h: 12 14 c2 01 01 11 01 c3 2a 3f 04 00 00 00 84 00 // ........*?......
00020h: 00 01 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00060h: 01 21 00 14 0b 00 00 00 01 03 02 11 08 00 00 04 // .!..............
00080h: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00090h: bf 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
000a0h: 09 1e 10 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00100h: 14 82 00 02 02 00 00 10 01 00 00 00 00 00 00 00 // ................
00200h: 01 00 77 00 01 03 22 22 00 00 00 00 00 00 00 00 // ..w...""........
00210h: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00260h: 00 00 b5 70 34 3d 81 cb 00 00 00 00 00 00 00 00 // ...p4=..........
00280h: 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
004a0h: 54 45 53 4c 41 03 01 10 00 00 00 00 00 00 00 00 // TESLA...........
004b0h: 94 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00500h: 90 cc 24 53 59 4e 41 53 22 20 05 06 04 04 64 00 // ..$SYNAS" ....d.
00600h: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
02000h: 00 00 01 00 00 00 00 00 00 00 00 00 77 00 01 03 // ............w...
02200h: 14 14 c2 01 01 11 01 c3 2a 3f 04 00 00 00 84 00 // ........*?......
02210h: 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
Receiver Capability
00000h DPCD_REV: 1.2
00001h MAX_LINK_RATE: HBR2
00002h MAX_LANE_COUNT: 2, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
00003h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5
00004h NORP: 2
00005h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DisplayPort, DETAILED_CAP_INFO_AVAILABLE
00006h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
00007h DOWN_STREAM_PORT_COUNT: 3, MSA_TIMING_PAR_IGNORED, OUI_SUPPORT
00008h RECEIVE_PORT_0_CAP_0: LOCAL_EDID_PRESENT, ?0x28
00009h RECEIVE_PORT_0_BUFFER_SIZE: 2048 bytes per lane
0000ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
0000eh TRAINING_AUX_RD_INTERVAL: 16ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
00021h MSTM_CAP: MST_CAP
00022h NUMBER_OF_AUDIO_ENDPOINTS: 1
00060h DSC_SUPPORT: DSC_DECOMPRESSION_IS_SUPPORTED
00061h DSC_REV: 1.2
00062h DSC_RC_BUF_BLK_SIZE: 1kB
00063h DSC_RC_BUF_SIZE: 20 * DSC_RC_BUF_BLK_SIZE
00064h DSC_SLICE_CAP_1 & 2: 1, 2, 4 max slices per DisplayPort DSC sink
00065h DSC_LINE_BUF_BIT_DEPTH: 9 bits
00066h DSC_BLK_PREDICTION_SUPPORT:
00067h DSC_MAX_BITS_PER_PIXEL: 16 bpp
00069h DSC_DEC_COLOR_FORMAT_CAP: RGB, YCbCr 4:4:4
0006ah DSC_DEC_COLOR_DEPTH_CAP: 8 bpc
0006bh DSC_PEAK_THROUGHPUT: MODE_0 = 340 Mp/s, MODE_1 = 340 Mp/s
0006ch DSC_MAX_SLICE_WIDTH: 2560 pixels
0006fh DSC_BITS_PER_PIXEL_INC: 1 bpp
00080h DOWNSTREAM_PORT_0: PORT_TYPE = DisplayPort, HPD aware
00090h FEC_CAPABILITY: FEC_CAPABLE, FEC_UNCORR_BLK_ERROR_COUNT_CAP, FEC_CORR_BLK_ERROR_COUNT_CAP, FEC_BIT_ERROR_COUNT_CAP, PARITY_BLOCK_ERROR_COUNT_CAP, PARITY_ERROR_COUNT_CAP, FEC_ERROR_REPORTING_POLICY_SUPPORTED
000a0h DSC_BRANCH_OVERALL_THROUGHPUT_0: 1050 Mp/s
000a1h DSC_BRANCH_OVERALL_THROUGHPUT_1: 2100 Mp/s
000a2h DSC_BRANCH_MAX_LINE_WIDTH: 5120 pixels
Link Configuration
00100h LINK_BW_SET: HBR2
00101h LANE_COUNT_SET: 2, ENHANCED_FRAME_EN
00103h TRAINING_LANE0_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
00104h TRAINING_LANE1_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
00105h TRAINING_LANE2_SET: TRAIN_VOLTAGE_SWING_LEVEL_0, TRAIN_PRE_EMPH_LEVEL_0
00106h TRAINING_LANE3_SET: TRAIN_VOLTAGE_SWING_LEVEL_0, TRAIN_PRE_EMPH_LEVEL_0
00107h DOWNSPREAD_CTRL: SPREAD_AMP_0_5
00108h MAIN_LINK_CHANNEL_CODING_SET: SET_ANSI_8B10B
00160h DSC_ENABLE: disabled
Link/Sink Device Status
00200h SINK_COUNT: 1
00202h LANE0_1_STATUS: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00202h LANE0_1_STATUS: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00203h LANE2_3_STATUS: LANE2 =
00203h LANE2_3_STATUS: LANE3 =
00204h LANE_ALIGN_STATUS_UPDATED: INTERLANE_ALIGN_DONE
00205h SINK_STATUS: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
00206h ADJUST_REQUEST_LANE0_1: LANE0 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
00206h ADJUST_REQUEST_LANE0_1: LANE1 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
00207h ADJUST_REQUEST_LANE2_3: LANE2 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
00207h ADJUST_REQUEST_LANE2_3: LANE3 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
00210h SYMBOL_ERROR_COUNT_LANE0: 0, valid
00212h SYMBOL_ERROR_COUNT_LANE1: 0, valid
00214h SYMBOL_ERROR_COUNT_LANE2: 0
00216h SYMBOL_ERROR_COUNT_LANE3: 0
00262h TEST_FAUX_BACK_CHANNEL_TEST_PATTERN: ?5 (unknown FAUX_BACK_CHANNEL_TEST_PATTERN), ?0xb0
00263h : 70 34 3d 81 cb 00 00 00 00 00 00 00 00 // p4=..........
00282h FAUX_BACK_CHANNEL_SYMBOL_ERROR_COUNT_CONTROL: COUNT_SYMBOL
Sink Device-Specific
004a0h : 54 45 53 4c 41 03 01 10 00 00 00 00 00 00 00 00 // TESLA...........
004b0h : 94 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
Branch Device-Specific
00500h BRANCH_OUI: 90-CC-24 = Synaptics, Inc
00503h BRANCH_ID: 53 59 4e 41 53 22 // SYNAS"
00509h BRANCH_HW_REV: 2.0
0050ah BRANCH_SW_REV: 5.6
0050ch : 04 04 64 00 // ..d.
Sink Control
00600h SET_POWER: SET_POWER_D0
DPRX ESI (Event Status Indicator)
02002h SINK_COUNT_ESI: 1
0200ch LANE0_1_STATUS_ESI: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200ch LANE0_1_STATUS_ESI: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200dh LANE2_3_STATUS_ESI: LANE2 =
0200dh LANE2_3_STATUS_ESI: LANE3 =
0200eh LANE_ALIGN_STATUS_UPDATED_ESI: INTERLANE_ALIGN_DONE
0200fh SINK_STATUS_ESI: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
Extended Receiver Capability
02200h DP13_DPCD_REV: 1.4
02201h MAX_LINK_RATE: HBR2
02202h MAX_LANE_COUNT: 2, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
02203h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5
02204h NORP: 2
02205h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DisplayPort, DETAILED_CAP_INFO_AVAILABLE
02206h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
02207h DOWN_STREAM_PORT_COUNT: 3, MSA_TIMING_PAR_IGNORED, OUI_SUPPORT
02208h RECEIVE_PORT_0_CAP_0: LOCAL_EDID_PRESENT, ?0x28
02209h RECEIVE_PORT_0_BUFFER_SIZE: 2048 bytes per lane
0220ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
0220eh TRAINING_AUX_RD_INTERVAL: 16ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
02210h DPRX_FEATURE_ENUMERATION_LIST: SST_SPLIT_SDP_CAP, VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED
}; // dpcd
message 0x01000: 10 02 cb 01 d5
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=2 , somt=1 eomt=1 zero=0 seq=0 crc=0xb:ok ... ; crc=0xd5:ok
type=0x01:LINK_ADDRESS
message 0x01400: 10 2d 8c 01 00 00 00 00 00 00 00 00 00 00 00 00
0x01410: 00 00 00 00 04 90 c0 01 00 00 00 00 00 00 00 00
0x01420: 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 a5
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=45 , somt=1 eomt=0 zero=0 seq=0 crc=0xc:ok ... ; crc=0xa5:ok
message 0x01400: 10 25 45 00 00 00 00 00 00 00 00 00 00 00 00 00
0x01410: 00 00 00 33 40 14 00 00 00 00 00 00 00 00 00 00
0x01420: 00 00 00 00 00 00 11 dc
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=37 , somt=0 eomt=1 zero=0 seq=0 crc=0x5:ok ... ; crc=0xdc:ok
type=0x01:LINK_ADDRESS reply_type=ACK guid=00000000-0000-0000-0000-000000000000 , zeros=0 ports=4 , {
input=1 Peer_Device_Type=1:"Source device or SST Branch device connected to an upstream port" port=0 , Messaging_Capability_Status=1 DisplayPort_Device_Plug_Status=1 zeros=0
input=0 Peer_Device_Type=0:"No device connected" port=1 , Messaging_Capability_Status=0 DisplayPort_Device_Plug_Status=0 Legacy_Device_Plug_Status=0 zeros=0 , Dpcd_Revision=0.0 , Peer_Guid=00000000-0000-0000-0000-000000000000 , Number_SDP_Streams=0 Number_SDP_Stream_Sinks=0
input=0 Peer_Device_Type=0:"No device connected" port=2 , Messaging_Capability_Status=0 DisplayPort_Device_Plug_Status=0 Legacy_Device_Plug_Status=0 zeros=0 , Dpcd_Revision=0.0 , Peer_Guid=00000000-0000-0000-0000-000000000000 , Number_SDP_Streams=0 Number_SDP_Stream_Sinks=0
input=0 Peer_Device_Type=3:"SST Sink device or Stream Sink in an MST Sink/Composite device" port=3 , Messaging_Capability_Status=0 DisplayPort_Device_Plug_Status=1 Legacy_Device_Plug_Status=0 zeros=0 , Dpcd_Revision=1.4 , Peer_Guid=00000000-0000-0000-0000-000000000000 , Number_SDP_Streams=1 Number_SDP_Stream_Sinks=1
}
Port 1 = {
message 0x01000: 10 43 d4 10 10 e2
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=3 , somt=1 eomt=1 zero=0 seq=1 crc=0x4:ok ... ; crc=0xe2:ok
type=0x10:ENUM_PATH_RESOURCES port:1 zeros:0
message 0x01400: 10 47 d3 10 10 00 00 00 00 9f
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=7 , somt=1 eomt=1 zero=0 seq=1 crc=0x3:ok ... ; crc=0x9f:ok
type=0x10:ENUM_PATH_RESOURCES reply_type=ACK port=1 zeros=0 FEC_Capable=0, Full_PBN=0x0000 , Available_PBN=0x0000
}; // Port 1
Port 2 = {
message 0x01000: 10 43 c7 10 20 14
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=3 , somt=1 eomt=1 zero=0 seq=0 crc=0x7:ok ... ; crc=0x14:ok
type=0x10:ENUM_PATH_RESOURCES port:2 zeros:0
message 0x01400: 10 47 c0 10 20 00 00 00 00 6f
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=7 , somt=1 eomt=1 zero=0 seq=0 crc=0x0:ok ... ; crc=0x6f:ok
type=0x10:ENUM_PATH_RESOURCES reply_type=ACK port=2 zeros=0 FEC_Capable=0, Full_PBN=0x0000 , Available_PBN=0x0000
}; // Port 2
Port 3 = {
message 0x01000: 10 43 d4 10 30 46
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=3 , somt=1 eomt=1 zero=0 seq=1 crc=0x4:ok ... ; crc=0x46:ok
type=0x10:ENUM_PATH_RESOURCES port:3 zeros:0
message 0x01400: 10 47 d3 10 30 0f 00 0f 00 bc
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=7 , somt=1 eomt=1 zero=0 seq=1 crc=0x3:ok ... ; crc=0xbc:ok
type=0x10:ENUM_PATH_RESOURCES reply_type=ACK port=3 zeros=0 FEC_Capable=0, Full_PBN=0x0f00 , Available_PBN=0x0f00
message 0x01000: 10 06 cc 20 30 00 00 10 66
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=6 , somt=1 eomt=1 zero=0 seq=0 crc=0xc:ok ... ; crc=0x66:ok
type=0x20:REMOTE_DPCD_READ port=3 dpcd=00000 , bytes=16
message 0x01400: 10 14 c9 20 03 10 12 14 c4 81 01 1d 01 c1 2a 3f
0x01410: 04 00 00 00 84 00 1e
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=20 , somt=1 eomt=1 zero=0 seq=0 crc=0x9:ok ... ; crc=0x1e:ok
type=0x20:REMOTE_DPCD_READ reply_type=ACK zeros=0 port=3 , Number_Of_Bytes_Read=16 , Data_Read=1214c481011d01c12a3f040000008400
dpcd = {
00000h: 12 14 c4 81 01 1d 01 c1 2a 3f 04 00 00 00 84 00 // ........*?......
00020h: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00050h: 89 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00080h: 0b f0 1a fe 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00090h: 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
000a0h: 00 00 00 01 98 08 00 28 ff ff 0f 0f 0e 0e 0e 00 // .......(........
00100h: 0a 84 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00200h: 01 00 77 77 01 03 00 00 00 00 00 00 00 00 00 00 // ..ww............
00210h: 00 80 00 80 00 80 00 80 00 00 00 00 00 00 00 00 // ................
00240h: 00 00 00 00 00 00 20 00 00 00 00 00 00 00 00 00 // ...... .........
00280h: 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00300h: 00 10 fa 70 48 44 4d 49 67 10 01 00 00 1c f8 01 // ...pHDMIg.......
00310h: 00 10 fa 70 48 44 4d 49 67 10 01 00 00 1c f8 01 // ...pHDMIg.......
004a0h: 54 45 53 4c 41 01 01 10 00 00 00 00 00 00 00 00 // TESLA...........
004b0h: b4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00500h: 90 cc 24 53 59 4e 41 71 00 10 07 02 78 06 00 00 // ..$SYNAq....x...
00510h: 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // (...............
005e0h: 0f 4c 6f 61 64 20 41 46 45 20 64 61 74 61 20 66 // .Load AFE data f
00600h: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
02000h: 00 00 01 00 00 00 00 00 00 00 00 00 77 77 01 03 // ............ww..
02200h: 14 1e c4 81 01 1d 01 c1 2a 3f 04 00 00 00 84 00 // ........*?......
02210h: 0a 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 // ................
03000h: 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 // ................
03030h: 01 00 00 00 00 00 7e 00 00 00 00 00 00 00 00 00 // ......~.........
68000h: 04 ee aa f9 91 00 00 00 00 00 00 00 00 00 00 00 // ................
68020h: 00 00 00 00 00 00 00 00 03 00 01 01 00 00 00 00 // ................
69000h: 00 00 00 00 00 00 00 00 00 00 00 0d 50 b4 8f f9 // ............P...
69010h: c8 c3 74 f2 3b 23 c4 60 1b e4 41 e5 f7 a5 ce 8c // ..t.;#.`..A.....
69020h: 6e ce b3 d8 4e e3 a1 fb c3 d4 60 79 2f 18 16 da // n...N.....`y/...
692c0h: 3c 73 a1 db f4 ba b8 57 3a 08 b7 d1 a2 2a e3 bb // <s.....W:....*..
692e0h: 47 b2 ba 1e 22 07 23 37 ce 06 24 78 45 13 ec cb // G...".#7..$xE...
Receiver Capability
00000h DPCD_REV: 1.2
00001h MAX_LINK_RATE: HBR2
00002h MAX_LANE_COUNT: 4, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
00003h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5, TPS4_SUPPORTED
00004h NORP: 2
00005h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DVI or HDMI, FORMAT_CONVERSION, DETAILED_CAP_INFO_AVAILABLE
00006h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
00007h DOWN_STREAM_PORT_COUNT: 1, MSA_TIMING_PAR_IGNORED, OUI_SUPPORT
00008h RECEIVE_PORT_0_CAP_0: LOCAL_EDID_PRESENT, ?0x28
00009h RECEIVE_PORT_0_BUFFER_SIZE: 2048 bytes per lane
0000ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
0000eh TRAINING_AUX_RD_INTERVAL: 16ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
00022h NUMBER_OF_AUDIO_ENDPOINTS: 1
00050h : 89 03 00 00 // ....
00080h DOWNSTREAM_PORT_0: PORT_TYPE = HDMI, HPD aware, 600 MHz max TMDS clock, DS_MAX_BPC = 12bpc, PCON_MAX_FRL_BW = 48Gbps, YCBCR422_PASS_THROUGH, YCBCR420_PASS_THROUGH, YCBCR444_TO_422_CONV, YCBCR444_TO_420_CONV, BT601_RGB_YCBCR_CONV, BT709_RGB_YCBCR_CONV, BT2020_RGB_YCBCR_CONV
00091h FEC_CAPABILITY_1: AGGREGATED_ERROR_COUNTERS_CAPABLE
000a3h DFP_CAPABILITY_EXTENSION_SUPPORT: true
000a4h DFP_CAPABILITY_EXTENSION_MAX_PIXEL_RATE: 2200 Mp/s
000a6h DFP_CAPABILITY_EXTENSION_MAX_VIDEO_H: 10240 pixels
000a8h DFP_CAPABILITY_EXTENSION_MAX_VIDEO_V: 65535 pixels
000aah DFP_CAPABILITY_EXTENSION_ENCODING_FORMAT_CAPS: RGB, YCbCr 4:4:4, YCbCr 4:2:2, YCbCr 4:2:0
000abh DFP_CAPABILITY_EXTENSION_RGB_COLOR_DEPTH_CAPS: 6, 8, 10, 12 bpc
000ach DFP_CAPABILITY_EXTENSION_YCBCR444_COLOR_DEPTH_CAPS: 8, 10, 12 bpc
000adh DFP_CAPABILITY_EXTENSION_YCBCR422_COLOR_DEPTH_CAPS: 8, 10, 12 bpc
000aeh DFP_CAPABILITY_EXTENSION_YCBCR420_COLOR_DEPTH_CAPS: 8, 10, 12 bpc
Link Configuration
00100h LINK_BW_SET: HBR
00101h LANE_COUNT_SET: 4, ENHANCED_FRAME_EN
Link/Sink Device Status
00200h SINK_COUNT: 1
00202h LANE0_1_STATUS: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00202h LANE0_1_STATUS: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00203h LANE2_3_STATUS: LANE2 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00203h LANE2_3_STATUS: LANE3 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00204h LANE_ALIGN_STATUS_UPDATED: INTERLANE_ALIGN_DONE
00205h SINK_STATUS: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
00210h SYMBOL_ERROR_COUNT_LANE0: 0, valid
00212h SYMBOL_ERROR_COUNT_LANE1: 0, valid
00214h SYMBOL_ERROR_COUNT_LANE2: 0, valid
00216h SYMBOL_ERROR_COUNT_LANE3: 0, valid
00246h TEST_SINK_MISC: TST_CRC_COUNT = 0, TEST_CRC_SUPPORTED
00282h FAUX_BACK_CHANNEL_SYMBOL_ERROR_COUNT_CONTROL: COUNT_SYMBOL
Source Device-Specific
00300h SOURCE_OUI: 00-10-FA = Apple, Inc.
00303h SOURCE_ID: 70 48 44 4d 49 67 // pHDMIg
00309h SOURCE_HW_REV: 1.0
0030ah SOURCE_SW_REV: 1.0
0030ch : 00 1c f8 01 // ....
00310h : 00 10 fa 70 48 44 4d 49 67 10 01 00 00 1c f8 01 // ...pHDMIg.......
Sink Device-Specific
004a0h : 54 45 53 4c 41 01 01 10 00 00 00 00 00 00 00 00 // TESLA...........
004b0h : b4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
Branch Device-Specific
00500h BRANCH_OUI: 90-CC-24 = Synaptics, Inc
00503h BRANCH_ID: 53 59 4e 41 71 00 // SYNAq.
00509h BRANCH_HW_REV: 1.0
0050ah BRANCH_SW_REV: 7.2
0050ch : 78 06 00 00 // x...
00510h : 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // (...............
005e0h : 0f 4c 6f 61 64 20 41 46 45 20 64 61 74 61 20 66 // .Load AFE data f
Sink Control
00600h SET_POWER: SET_POWER_D0
DPRX ESI (Event Status Indicator)
02002h SINK_COUNT_ESI: 1
0200ch LANE0_1_STATUS_ESI: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200ch LANE0_1_STATUS_ESI: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200dh LANE2_3_STATUS_ESI: LANE2 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200dh LANE2_3_STATUS_ESI: LANE3 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200eh LANE_ALIGN_STATUS_UPDATED_ESI: INTERLANE_ALIGN_DONE
0200fh SINK_STATUS_ESI: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
Extended Receiver Capability
02200h DP13_DPCD_REV: 1.4
02201h MAX_LINK_RATE: HBR3
02202h MAX_LANE_COUNT: 4, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
02203h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5, TPS4_SUPPORTED
02204h NORP: 2
02205h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DVI or HDMI, FORMAT_CONVERSION, DETAILED_CAP_INFO_AVAILABLE
02206h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
02207h DOWN_STREAM_PORT_COUNT: 1, MSA_TIMING_PAR_IGNORED, OUI_SUPPORT
02208h RECEIVE_PORT_0_CAP_0: LOCAL_EDID_PRESENT, ?0x28
02209h RECEIVE_PORT_0_BUFFER_SIZE: 2048 bytes per lane
0220ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
0220eh TRAINING_AUX_RD_INTERVAL: 16ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
02210h DPRX_FEATURE_ENUMERATION_LIST: SST_SPLIT_SDP_CAP, VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED
02211h : 00 00 00 03 // ....
PCON HDMI CONFIG PPS Override Buffer
03000h CEC_TUNNELING_CAPABILITY: CEC_TUNNELING_CAPABLE, CEC_SNOOPING_CAPABLE
0300fh CEC_LOGICAL_ADDRESS_MASK_2: CEC_LOGICAL_ADDRESS_15
03030h : 01 00 00 00 00 00 // ......
03036h PCON_HDMI_POST_FRL_STATUS: PCON_HDMI_LINK_MODE = PCON_HDMI_MODE_TMDS, PCON_HDMI_FRL_TRAINED_BW = 9Gbps, 18Gbps, 24Gbps, 32Gbps, 40Gbps, 48Gbps
HDCP 1.3 and HDCP 2.2
68000h AUX_HDCP_BKSV: 04 ee aa f9 91 // .....
68028h AUX_HDCP_BCAPS: BCAPS_HDCP_CAPABLE, BCAPS_REPEATER_PRESENT
6802ah AUX_HDCP_BINFO: DEVICE_COUNT = 1, DEPTH = 1
DP HDCP 2.2 Parameters
6900bh HDCP_2_2_REG_CERT_RX: 0d 50 b4 8f f9 // .P...
69010h : c8 c3 74 f2 3b 23 c4 60 1b e4 41 e5 f7 a5 ce 8c // ..t.;#.`..A.....
69020h : 6e ce b3 d8 4e e3 a1 fb c3 d4 60 79 2f 18 16 da // n...N.....`y/...
692c0h HDCP_2_2_REG_HPRIME: 3c 73 a1 db f4 ba b8 57 3a 08 b7 d1 a2 2a e3 bb // <s.....W:....*..
692e0h HDCP_2_2_REG_EKH_KM_RD: 47 b2 ba 1e 22 07 23 37 ce 06 24 78 45 13 ec cb // G...".#7..$xE...
}; // dpcd
message 0x01000: 21 30 02 c4 01 d5
lct=2 lcr=1 , rad=3 , broadcast=0 path=0 len=2 , somt=1 eomt=1 zero=0 seq=0 crc=0x4:ok ... ; crc=0xd5:ok
type=0x01:LINK_ADDRESS
message 0x01400: 20 30 29 c2 01 00 00 00 00 00 00 00 00 00 00 00
0x01410: 00 00 00 00 00 02 90 c0 33 40 14 00 00 00 00 00
0x01420: 00 00 00 00 00 00 00 00 00 00 00 11 23
lct=2 lcr=0 , rad=3 , broadcast=0 path=0 len=41 , somt=1 eomt=1 zero=0 seq=0 crc=0x2:ok ... ; crc=0x23:ok
type=0x01:LINK_ADDRESS reply_type=ACK guid=00000000-0000-0000-0000-000000000000 , zeros=0 ports=2 , {
input=1 Peer_Device_Type=1:"Source device or SST Branch device connected to an upstream port" port=0 , Messaging_Capability_Status=1 DisplayPort_Device_Plug_Status=1 zeros=0
input=0 Peer_Device_Type=3:"SST Sink device or Stream Sink in an MST Sink/Composite device" port=3 , Messaging_Capability_Status=0 DisplayPort_Device_Plug_Status=1 Legacy_Device_Plug_Status=0 zeros=0 , Dpcd_Revision=1.4 , Peer_Guid=00000000-0000-0000-0000-000000000000 , Number_SDP_Streams=1 Number_SDP_Stream_Sinks=1
}The parent entity is Monitor[1], which from all indications is my external display and the adapter is most likely connected to Port 3. Seems 4 lanes of HBR (somewhat equivalent to 2 lanes of HBR2 factoring in USB-C hard limit for video) is enough for 4K@120Hz with DSC enabled (no HDR):
Found this for 2017 Intel MacBook with Radeon GPU + Lenovo Thunderbolt 3 Dock 40AN + Cable Matters 102101-BLK + Sony X85J:
Code:
I2C Interfaces = {
[0] = {
IOFBCopyI2CInterfaceForBus = { id:0x400000000 busType:DisplayPort transactionTypes:(No,Simple,DDCci,Combined,DisplayPort,) commFlags:(UseSubAddress,) };
EDID from E-DDC (old method) = 00ffffffffffff004dd905c101010101011f0103805f36780a0dc9a05747982712484c2108008180a9c0714fb3000101010101010101b8ce0050f0705a8018108a00b8173200001e023a801871382d40582c4500b8173200001e000000fc00534f4e5920545620202a33300a000000fd0017790e883c000a2020202020200111020361f05a7576616065665d5e5f621f101405130420223c3e120311023f402f0d7f071507503d07bc570601670403830f00006e030c00400098442b0080010203046dd85dc401788001030000000000e200cbe305df01e20f3fe6060d01828220011d007251d01e206e285500b8173200001e000000000000000000000000a2
EDID from E-DDC = 00ffffffffffff004dd905c101010101011f0103805f36780a0dc9a05747982712484c2108008180a9c0714fb3000101010101010101b8ce0050f0705a8018108a00b8173200001e023a801871382d40582c4500b8173200001e000000fc00534f4e5920545620202a33300a000000fd0017790e883c000a2020202020200111020361f05a7576616065665d5e5f621f101405130420223c3e120311023f402f0d7f071507503d07bc570601670403830f00006e030c00400098442b0080010203046dd85dc401788001030000000000e200cbe305df01e20f3fe6060d01828220011d007251d01e206e285500b8173200001e000000000000000000000000a2
Timing Report = { (unexpected data: 000000000000000000) };
VCP Capabilities = {
(unexpected data at offset 0: 0000000000000000000000000000000000000000000000000000000000000000000000000000),
}; // VCP Capabilities
DisplayPort = {
dpcd = {
00000h: 12 14 c4 01 01 11 01 83 2a 3f 04 00 00 00 84 00 // ........*?......
00020h: 00 01 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00060h: 01 21 00 14 0b 00 00 00 01 03 02 11 08 00 00 04 // .!..............
00080h: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00090h: 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
000a0h: 0a 1e 10 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00100h: 14 84 00 02 02 02 02 10 01 00 00 00 00 00 00 00 // ................
00200h: 01 00 77 77 01 03 22 22 00 00 00 00 00 00 00 00 // ..ww..""........
00210h: 00 80 00 80 00 80 00 80 00 00 00 00 00 00 00 00 // ................
00240h: 4f 0f 5b e8 bd 7f 00 00 00 00 00 00 00 00 00 00 // O.[.............
00280h: 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
004a0h: 54 45 53 4c 41 03 01 10 00 00 00 00 00 00 00 00 // TESLA...........
004b0h: 94 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00500h: 90 cc 24 53 59 4e 41 53 22 10 05 07 01 04 53 00 // ..$SYNAS".....S.
00600h: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
02000h: 00 00 01 00 00 00 00 00 00 00 00 00 77 77 01 03 // ............ww..
02200h: 14 14 c4 01 01 11 01 83 2a 3f 04 00 00 00 84 00 // ........*?......
02210h: 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
02240h: 00 14 c4 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
02260h: 00 14 c4 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
Receiver Capability
00000h DPCD_REV: 1.2
00001h MAX_LINK_RATE: HBR2
00002h MAX_LANE_COUNT: 4, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
00003h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5
00004h NORP: 2
00005h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DisplayPort, DETAILED_CAP_INFO_AVAILABLE
00006h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
00007h DOWN_STREAM_PORT_COUNT: 3, OUI_SUPPORT
00008h RECEIVE_PORT_0_CAP_0: LOCAL_EDID_PRESENT, ?0x28
00009h RECEIVE_PORT_0_BUFFER_SIZE: 2048 bytes per lane
0000ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
0000eh TRAINING_AUX_RD_INTERVAL: 16ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
00021h MSTM_CAP: MST_CAP
00022h NUMBER_OF_AUDIO_ENDPOINTS: 1
00060h DSC_SUPPORT: DSC_DECOMPRESSION_IS_SUPPORTED
00061h DSC_REV: 1.2
00062h DSC_RC_BUF_BLK_SIZE: 1kB
00063h DSC_RC_BUF_SIZE: 20 * DSC_RC_BUF_BLK_SIZE
00064h DSC_SLICE_CAP_1 & 2: 1, 2, 4 max slices per DisplayPort DSC sink
00065h DSC_LINE_BUF_BIT_DEPTH: 9 bits
00066h DSC_BLK_PREDICTION_SUPPORT:
00067h DSC_MAX_BITS_PER_PIXEL: 16 bpp
00069h DSC_DEC_COLOR_FORMAT_CAP: RGB, YCbCr 4:4:4
0006ah DSC_DEC_COLOR_DEPTH_CAP: 8 bpc
0006bh DSC_PEAK_THROUGHPUT: MODE_0 = 340 Mp/s, MODE_1 = 340 Mp/s
0006ch DSC_MAX_SLICE_WIDTH: 2560 pixels
0006fh DSC_BITS_PER_PIXEL_INC: 1 bpp
00080h DOWNSTREAM_PORT_0: PORT_TYPE = DisplayPort, HPD aware
00090h FEC_CAPABILITY: FEC_CAPABLE, FEC_UNCORR_BLK_ERROR_COUNT_CAP, FEC_CORR_BLK_ERROR_COUNT_CAP, FEC_BIT_ERROR_COUNT_CAP
000a0h DSC_BRANCH_OVERALL_THROUGHPUT_0: 1100 Mp/s
000a1h DSC_BRANCH_OVERALL_THROUGHPUT_1: 2100 Mp/s
000a2h DSC_BRANCH_MAX_LINE_WIDTH: 5120 pixels
Link Configuration
00100h LINK_BW_SET: HBR2
00101h LANE_COUNT_SET: 4, ENHANCED_FRAME_EN
00103h TRAINING_LANE0_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
00104h TRAINING_LANE1_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
00105h TRAINING_LANE2_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
00106h TRAINING_LANE3_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
00107h DOWNSPREAD_CTRL: SPREAD_AMP_0_5
00108h MAIN_LINK_CHANNEL_CODING_SET: SET_ANSI_8B10B
00160h DSC_ENABLE: disabled
Link/Sink Device Status
00200h SINK_COUNT: 1
00202h LANE0_1_STATUS: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00202h LANE0_1_STATUS: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00203h LANE2_3_STATUS: LANE2 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00203h LANE2_3_STATUS: LANE3 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00204h LANE_ALIGN_STATUS_UPDATED: INTERLANE_ALIGN_DONE
00205h SINK_STATUS: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
00206h ADJUST_REQUEST_LANE0_1: LANE0 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
00206h ADJUST_REQUEST_LANE0_1: LANE1 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
00207h ADJUST_REQUEST_LANE2_3: LANE2 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
00207h ADJUST_REQUEST_LANE2_3: LANE3 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
00210h SYMBOL_ERROR_COUNT_LANE0: 0, valid
00212h SYMBOL_ERROR_COUNT_LANE1: 0, valid
00214h SYMBOL_ERROR_COUNT_LANE2: 0, valid
00216h SYMBOL_ERROR_COUNT_LANE3: 0, valid
00240h TEST_CRC_R_CR: 0x0f4f
00242h TEST_CRC_G_Y: 0xe85b
00244h TEST_CRC_B_CB: 0x7fbd
00282h FAUX_BACK_CHANNEL_SYMBOL_ERROR_COUNT_CONTROL: COUNT_SYMBOL
Sink Device-Specific
004a0h : 54 45 53 4c 41 03 01 10 00 00 00 00 00 00 00 00 // TESLA...........
004b0h : 94 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
Branch Device-Specific
00500h BRANCH_OUI: 90-CC-24 = Synaptics, Inc
00503h BRANCH_ID: 53 59 4e 41 53 22 // SYNAS"
00509h BRANCH_HW_REV: 1.0
0050ah BRANCH_SW_REV: 5.7
0050ch : 01 04 53 00 // ..S.
Sink Control
00600h SET_POWER: SET_POWER_D0
DPRX ESI (Event Status Indicator)
02002h SINK_COUNT_ESI: 1
0200ch LANE0_1_STATUS_ESI: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200ch LANE0_1_STATUS_ESI: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200dh LANE2_3_STATUS_ESI: LANE2 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200dh LANE2_3_STATUS_ESI: LANE3 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200eh LANE_ALIGN_STATUS_UPDATED_ESI: INTERLANE_ALIGN_DONE
0200fh SINK_STATUS_ESI: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
Extended Receiver Capability
02200h DP13_DPCD_REV: 1.4
02201h MAX_LINK_RATE: HBR2
02202h MAX_LANE_COUNT: 4, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
02203h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5
02204h NORP: 2
02205h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DisplayPort, DETAILED_CAP_INFO_AVAILABLE
02206h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
02207h DOWN_STREAM_PORT_COUNT: 3, OUI_SUPPORT
02208h RECEIVE_PORT_0_CAP_0: LOCAL_EDID_PRESENT, ?0x28
02209h RECEIVE_PORT_0_BUFFER_SIZE: 2048 bytes per lane
0220ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
0220eh TRAINING_AUX_RD_INTERVAL: 16ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
02210h DPRX_FEATURE_ENUMERATION_LIST: SST_SPLIT_SDP_CAP, VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED
02240h : 00 14 c4 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
}; // dpcd
message 0x01000: 10 02 cb 01 d5
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=2 , somt=1 eomt=1 zero=0 seq=0 crc=0xb:ok ... ; crc=0xd5:ok
type=0x01:LINK_ADDRESS
message 0x01400: 10 2d 8c 01 00 00 00 00 00 00 00 00 00 00 00 00
0x01410: 00 00 00 00 04 90 c0 01 00 00 00 00 00 00 00 00
0x01420: 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 a5
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=45 , somt=1 eomt=0 zero=0 seq=0 crc=0xc:ok ... ; crc=0xa5:ok
message 0x01400: 10 25 45 00 00 00 00 00 00 00 00 00 00 00 00 00
0x01410: 00 00 00 33 40 14 00 00 00 00 00 00 00 00 00 00
0x01420: 00 00 00 00 00 00 11 dc
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=37 , somt=0 eomt=1 zero=0 seq=0 crc=0x5:ok ... ; crc=0xdc:ok
type=0x01:LINK_ADDRESS reply_type=ACK guid=00000000-0000-0000-0000-000000000000 , zeros=0 ports=4 , {
input=1 Peer_Device_Type=1:"Source device or SST Branch device connected to an upstream port" port=0 , Messaging_Capability_Status=1 DisplayPort_Device_Plug_Status=1 zeros=0
input=0 Peer_Device_Type=0:"No device connected" port=1 , Messaging_Capability_Status=0 DisplayPort_Device_Plug_Status=0 Legacy_Device_Plug_Status=0 zeros=0 , Dpcd_Revision=0.0 , Peer_Guid=00000000-0000-0000-0000-000000000000 , Number_SDP_Streams=0 Number_SDP_Stream_Sinks=0
input=0 Peer_Device_Type=0:"No device connected" port=2 , Messaging_Capability_Status=0 DisplayPort_Device_Plug_Status=0 Legacy_Device_Plug_Status=0 zeros=0 , Dpcd_Revision=0.0 , Peer_Guid=00000000-0000-0000-0000-000000000000 , Number_SDP_Streams=0 Number_SDP_Stream_Sinks=0
input=0 Peer_Device_Type=3:"SST Sink device or Stream Sink in an MST Sink/Composite device" port=3 , Messaging_Capability_Status=0 DisplayPort_Device_Plug_Status=1 Legacy_Device_Plug_Status=0 zeros=0 , Dpcd_Revision=1.4 , Peer_Guid=00000000-0000-0000-0000-000000000000 , Number_SDP_Streams=1 Number_SDP_Stream_Sinks=1
}
Port 1 = {
message 0x01000: 10 43 d4 10 10 e2
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=3 , somt=1 eomt=1 zero=0 seq=1 crc=0x4:ok ... ; crc=0xe2:ok
type=0x10:ENUM_PATH_RESOURCES port:1 zeros:0
message 0x01400: 10 47 d3 10 10 00 00 00 00 9f
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=7 , somt=1 eomt=1 zero=0 seq=1 crc=0x3:ok ... ; crc=0x9f:ok
type=0x10:ENUM_PATH_RESOURCES reply_type=ACK port=1 zeros=0 FEC_Capable=0, Full_PBN=0x0000 , Available_PBN=0x0000
}; // Port 1
Port 2 = {
message 0x01000: 10 43 c7 10 20 14
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=3 , somt=1 eomt=1 zero=0 seq=0 crc=0x7:ok ... ; crc=0x14:ok
type=0x10:ENUM_PATH_RESOURCES port:2 zeros:0
message 0x01400: 10 47 c0 10 20 00 00 00 00 6f
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=7 , somt=1 eomt=1 zero=0 seq=0 crc=0x0:ok ... ; crc=0x6f:ok
type=0x10:ENUM_PATH_RESOURCES reply_type=ACK port=2 zeros=0 FEC_Capable=0, Full_PBN=0x0000 , Available_PBN=0x0000
}; // Port 2
Port 3 = {
message 0x01000: 10 43 d4 10 30 46
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=3 , somt=1 eomt=1 zero=0 seq=1 crc=0x4:ok ... ; crc=0x46:ok
type=0x10:ENUM_PATH_RESOURCES port:3 zeros:0
message 0x01400: 10 47 d3 10 30 0f 00 0f 00 bc
lct=1 lcr=0 , rad= , broadcast=0 path=1 len=7 , somt=1 eomt=1 zero=0 seq=1 crc=0x3:ok ... ; crc=0xbc:ok
type=0x10:ENUM_PATH_RESOURCES reply_type=ACK port=3 zeros=0 FEC_Capable=0, Full_PBN=0x0f00 , Available_PBN=0x0f00
message 0x01000: 10 06 cc 20 30 00 00 10 66
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=6 , somt=1 eomt=1 zero=0 seq=0 crc=0xc:ok ... ; crc=0x66:ok
type=0x20:REMOTE_DPCD_READ port=3 dpcd=00000 , bytes=16
message 0x01400: 10 14 c9 20 03 10 12 14 c4 81 01 1d 01 c1 2a 3f
0x01410: 04 00 00 00 84 00 1e
lct=1 lcr=0 , rad= , broadcast=0 path=0 len=20 , somt=1 eomt=1 zero=0 seq=0 crc=0x9:ok ... ; crc=0x1e:ok
type=0x20:REMOTE_DPCD_READ reply_type=ACK zeros=0 port=3 , Number_Of_Bytes_Read=16 , Data_Read=1214c481011d01c12a3f040000008400
dpcd = {
00000h: 12 14 c4 81 01 1d 01 c1 2a 3f 04 00 00 00 84 00 // ........*?......
00020h: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00050h: 89 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00080h: 0b f0 1a fe 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00090h: 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
000a0h: 00 00 00 01 98 08 00 28 ff ff 0f 0f 0e 0e 0e 00 // .......(........
00100h: 14 84 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00200h: 01 00 77 77 01 03 00 00 00 00 00 00 00 00 00 00 // ..ww............
00210h: 00 80 00 80 00 80 00 80 00 00 00 00 00 00 00 00 // ................
00240h: 00 00 00 00 00 00 20 00 00 00 00 00 00 00 00 00 // ...... .........
00280h: 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00300h: 00 10 fa 70 48 44 4d 49 67 10 01 00 00 1c f8 01 // ...pHDMIg.......
00310h: 00 10 fa 70 48 44 4d 49 67 10 01 00 00 1c f8 01 // ...pHDMIg.......
004a0h: 54 45 53 4c 41 01 01 10 00 00 00 00 00 00 00 00 // TESLA...........
004b0h: b4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00500h: 90 cc 24 53 59 4e 41 71 00 10 07 02 78 06 00 00 // ..$SYNAq....x...
00510h: 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // (...............
005e0h: 0f 4c 6f 61 64 20 41 46 45 20 64 61 74 61 20 66 // .Load AFE data f
00600h: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
02000h: 00 00 01 00 00 00 00 00 00 00 00 00 77 77 01 03 // ............ww..
02200h: 14 1e c4 81 01 1d 01 c1 2a 3f 04 00 00 00 84 00 // ........*?......
02210h: 0a 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 // ................
03000h: 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 // ................
03030h: 01 00 00 00 00 00 7f 00 00 00 00 00 00 00 00 00 // ................
68000h: 04 ee aa f9 91 00 00 00 00 00 00 00 00 00 00 00 // ................
68020h: 00 00 00 00 00 00 00 00 03 00 01 01 00 00 00 00 // ................
69000h: 00 00 00 00 00 00 00 00 00 00 00 0d 50 b4 8f f9 // ............P...
69010h: c8 c3 74 f2 3b 23 c4 60 1b e4 41 e5 f7 a5 ce 8c // ..t.;#.`..A.....
69020h: 6e ce b3 d8 4e e3 a1 fb c3 d4 60 79 2f 18 16 da // n...N.....`y/...
692c0h: ba 69 4a 25 6b 66 98 83 2f 61 f9 f5 d0 ef 57 c1 // .iJ%kf../a....W.
692e0h: a1 19 3e c9 77 9b dd ee 8e 5d 54 6a 51 44 9c d2 // ..>.w....]TjQD..
Receiver Capability
00000h DPCD_REV: 1.2
00001h MAX_LINK_RATE: HBR2
00002h MAX_LANE_COUNT: 4, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
00003h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5, TPS4_SUPPORTED
00004h NORP: 2
00005h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DVI or HDMI, FORMAT_CONVERSION, DETAILED_CAP_INFO_AVAILABLE
00006h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
00007h DOWN_STREAM_PORT_COUNT: 1, MSA_TIMING_PAR_IGNORED, OUI_SUPPORT
00008h RECEIVE_PORT_0_CAP_0: LOCAL_EDID_PRESENT, ?0x28
00009h RECEIVE_PORT_0_BUFFER_SIZE: 2048 bytes per lane
0000ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
0000eh TRAINING_AUX_RD_INTERVAL: 16ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
00022h NUMBER_OF_AUDIO_ENDPOINTS: 1
00050h : 89 03 00 00 // ....
00080h DOWNSTREAM_PORT_0: PORT_TYPE = HDMI, HPD aware, 600 MHz max TMDS clock, DS_MAX_BPC = 12bpc, PCON_MAX_FRL_BW = 48Gbps, YCBCR422_PASS_THROUGH, YCBCR420_PASS_THROUGH, YCBCR444_TO_422_CONV, YCBCR444_TO_420_CONV, BT601_RGB_YCBCR_CONV, BT709_RGB_YCBCR_CONV, BT2020_RGB_YCBCR_CONV
00091h FEC_CAPABILITY_1: AGGREGATED_ERROR_COUNTERS_CAPABLE
000a3h DFP_CAPABILITY_EXTENSION_SUPPORT: true
000a4h DFP_CAPABILITY_EXTENSION_MAX_PIXEL_RATE: 2200 Mp/s
000a6h DFP_CAPABILITY_EXTENSION_MAX_VIDEO_H: 10240 pixels
000a8h DFP_CAPABILITY_EXTENSION_MAX_VIDEO_V: 65535 pixels
000aah DFP_CAPABILITY_EXTENSION_ENCODING_FORMAT_CAPS: RGB, YCbCr 4:4:4, YCbCr 4:2:2, YCbCr 4:2:0
000abh DFP_CAPABILITY_EXTENSION_RGB_COLOR_DEPTH_CAPS: 6, 8, 10, 12 bpc
000ach DFP_CAPABILITY_EXTENSION_YCBCR444_COLOR_DEPTH_CAPS: 8, 10, 12 bpc
000adh DFP_CAPABILITY_EXTENSION_YCBCR422_COLOR_DEPTH_CAPS: 8, 10, 12 bpc
000aeh DFP_CAPABILITY_EXTENSION_YCBCR420_COLOR_DEPTH_CAPS: 8, 10, 12 bpc
Link Configuration
00100h LINK_BW_SET: HBR2
00101h LANE_COUNT_SET: 4, ENHANCED_FRAME_EN
Link/Sink Device Status
00200h SINK_COUNT: 1
00202h LANE0_1_STATUS: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00202h LANE0_1_STATUS: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00203h LANE2_3_STATUS: LANE2 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00203h LANE2_3_STATUS: LANE3 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
00204h LANE_ALIGN_STATUS_UPDATED: INTERLANE_ALIGN_DONE
00205h SINK_STATUS: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
00210h SYMBOL_ERROR_COUNT_LANE0: 0, valid
00212h SYMBOL_ERROR_COUNT_LANE1: 0, valid
00214h SYMBOL_ERROR_COUNT_LANE2: 0, valid
00216h SYMBOL_ERROR_COUNT_LANE3: 0, valid
00246h TEST_SINK_MISC: TST_CRC_COUNT = 0, TEST_CRC_SUPPORTED
00282h FAUX_BACK_CHANNEL_SYMBOL_ERROR_COUNT_CONTROL: COUNT_SYMBOL
Source Device-Specific
00300h SOURCE_OUI: 00-10-FA = Apple, Inc.
00303h SOURCE_ID: 70 48 44 4d 49 67 // pHDMIg
00309h SOURCE_HW_REV: 1.0
0030ah SOURCE_SW_REV: 1.0
0030ch : 00 1c f8 01 // ....
00310h : 00 10 fa 70 48 44 4d 49 67 10 01 00 00 1c f8 01 // ...pHDMIg.......
Sink Device-Specific
004a0h : 54 45 53 4c 41 01 01 10 00 00 00 00 00 00 00 00 // TESLA...........
004b0h : b4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
Branch Device-Specific
00500h BRANCH_OUI: 90-CC-24 = Synaptics, Inc
00503h BRANCH_ID: 53 59 4e 41 71 00 // SYNAq.
00509h BRANCH_HW_REV: 1.0
0050ah BRANCH_SW_REV: 7.2
0050ch : 78 06 00 00 // x...
00510h : 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // (...............
005e0h : 0f 4c 6f 61 64 20 41 46 45 20 64 61 74 61 20 66 // .Load AFE data f
Sink Control
00600h SET_POWER: SET_POWER_D0
DPRX ESI (Event Status Indicator)
02002h SINK_COUNT_ESI: 1
0200ch LANE0_1_STATUS_ESI: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200ch LANE0_1_STATUS_ESI: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200dh LANE2_3_STATUS_ESI: LANE2 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200dh LANE2_3_STATUS_ESI: LANE3 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
0200eh LANE_ALIGN_STATUS_UPDATED_ESI: INTERLANE_ALIGN_DONE
0200fh SINK_STATUS_ESI: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
Extended Receiver Capability
02200h DP13_DPCD_REV: 1.4
02201h MAX_LINK_RATE: HBR3
02202h MAX_LANE_COUNT: 4, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
02203h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5, TPS4_SUPPORTED
02204h NORP: 2
02205h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DVI or HDMI, FORMAT_CONVERSION, DETAILED_CAP_INFO_AVAILABLE
02206h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
02207h DOWN_STREAM_PORT_COUNT: 1, MSA_TIMING_PAR_IGNORED, OUI_SUPPORT
02208h RECEIVE_PORT_0_CAP_0: LOCAL_EDID_PRESENT, ?0x28
02209h RECEIVE_PORT_0_BUFFER_SIZE: 2048 bytes per lane
0220ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
0220eh TRAINING_AUX_RD_INTERVAL: 16ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
02210h DPRX_FEATURE_ENUMERATION_LIST: SST_SPLIT_SDP_CAP, VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED
02211h : 00 00 00 03 // ....
PCON HDMI CONFIG PPS Override Buffer
03000h CEC_TUNNELING_CAPABILITY: CEC_TUNNELING_CAPABLE, CEC_SNOOPING_CAPABLE
0300fh CEC_LOGICAL_ADDRESS_MASK_2: CEC_LOGICAL_ADDRESS_15
03030h : 01 00 00 00 00 00 // ......
03036h PCON_HDMI_POST_FRL_STATUS: PCON_HDMI_LINK_MODE = PCON_HDMI_MODE_FRL, PCON_HDMI_FRL_TRAINED_BW = 9Gbps, 18Gbps, 24Gbps, 32Gbps, 40Gbps, 48Gbps
HDCP 1.3 and HDCP 2.2
68000h AUX_HDCP_BKSV: 04 ee aa f9 91 // .....
68028h AUX_HDCP_BCAPS: BCAPS_HDCP_CAPABLE, BCAPS_REPEATER_PRESENT
6802ah AUX_HDCP_BINFO: DEVICE_COUNT = 1, DEPTH = 1
DP HDCP 2.2 Parameters
6900bh HDCP_2_2_REG_CERT_RX: 0d 50 b4 8f f9 // .P...
69010h : c8 c3 74 f2 3b 23 c4 60 1b e4 41 e5 f7 a5 ce 8c // ..t.;#.`..A.....
69020h : 6e ce b3 d8 4e e3 a1 fb c3 d4 60 79 2f 18 16 da // n...N.....`y/...
692c0h HDCP_2_2_REG_HPRIME: ba 69 4a 25 6b 66 98 83 2f 61 f9 f5 d0 ef 57 c1 // .iJ%kf../a....W.
692e0h HDCP_2_2_REG_EKH_KM_RD: a1 19 3e c9 77 9b dd ee 8e 5d 54 6a 51 44 9c d2 // ..>.w....]TjQD..
}; // dpcd
message 0x01000: 21 30 02 c4 01 d5
lct=2 lcr=1 , rad=3 , broadcast=0 path=0 len=2 , somt=1 eomt=1 zero=0 seq=0 crc=0x4:ok ... ; crc=0xd5:ok
type=0x01:LINK_ADDRESS
message 0x01400: 20 30 29 c2 01 00 00 00 00 00 00 00 00 00 00 00
0x01410: 00 00 00 00 00 02 90 c0 33 40 14 00 00 00 00 00
0x01420: 00 00 00 00 00 00 00 00 00 00 00 11 23
lct=2 lcr=0 , rad=3 , broadcast=0 path=0 len=41 , somt=1 eomt=1 zero=0 seq=0 crc=0x2:ok ... ; crc=0x23:ok
type=0x01:LINK_ADDRESS reply_type=ACK guid=00000000-0000-0000-0000-000000000000 , zeros=0 ports=2 , {
input=1 Peer_Device_Type=1:"Source device or SST Branch device connected to an upstream port" port=0 , Messaging_Capability_Status=1 DisplayPort_Device_Plug_Status=1 zeros=0
input=0 Peer_Device_Type=3:"SST Sink device or Stream Sink in an MST Sink/Composite device" port=3 , Messaging_Capability_Status=0 DisplayPort_Device_Plug_Status=1 Legacy_Device_Plug_Status=0 zeros=0 , Dpcd_Revision=1.4 , Peer_Guid=00000000-0000-0000-0000-000000000000 , Number_SDP_Streams=1 Number_SDP_Stream_Sinks=1
}But I see no reason why the adapter doesn't output RGB with Thunderbolt dock when they are essentially the same MST Hub
Last edited:
Which adapter did you use with it; the USB-C to HDMI or the DisplayPort to HDMI? The USB-C worked for me on one of the TS4's Thunderbolt ports, but I'm considering trying the DP one to free that port up.
It may be better to post the results as attachments, either as separate text files or in a zip.
I see the following in your results:
- USB-C dock is 2 lanes. Thunderbolt dock is 4 lanes.
- Both use the same MST hub (VMM5322) but different hardware/firmware versions.
- For the connection from the GPU to the MST hub, I think the Alpine Ridge Thunderbolt controller of the Thunderbolt dock or the 2017 iMac modifies the max link rate (reg 2200h) to HBR2. It will show as HBR3 for Macs that support HBR3 and have Titan Ridge or later.
- The USB-C dock has HW revision 2 and SW revision 5.6.
- The Thunderbolt dock has HW revision 1 and SW revision 5.7.
- DSC Decompression is limited to 8bpc. This is not a problem if DSC can be passed through the MST hub without decompression (requires downstream DisplayPort device to support DSC). Of course, the iMac doesn't support DSC so it's disabled in the given output.
- The USB-C dock has MSA_TIMING_PAR_IGNORED which I think is necessary for VRR.
- The USB-C dock appears to have max DSC throughput of 1050 Mp/s for RGB/4:4:4. I think max DSC throughput is per port.
- The Thunderbolt dock appears to have max 1100 Mp/s for RGB/4:4:4 (note that HDMI 4K120 is 1188MHz and CVT-RB2 is 1075MHz - you may need to reduce the blanking or the refresh rate slightly - 117Hz is 1047MHz)
- Both have max 2100 Mp/s for 4:2:2 and 4:2:0.
- The adapter used in both cases is the VMM7100 which supports 4 lanes of HBR3 input and FRL 12Gbps (per lane) output.
- The adapter connected to the USB-C dock has link rate HBR which I guess means it's using a low pixel clock mode (1440p60 or 4K30). The AllRez output is incomplete so I don't know all the modes the iMac 2017 allows or the capabilities of the Radeon GPU.
- The adapter connected to the USB-C dock has HDMI side connected as TMDS which is sufficient for the low pixel clock mode.
- The adapter connected to the Thunderbolt dock has link rate HBR2 which could be 4K60.
- The adapter connected to the Thunderbolt dock has HDMI side connected as FRL but I don't know if it's 6,8,10,12 Gbps per lane.
- The adapter doesn't say anything about haveing DSC support. Maybe the I2C info is incomplete? The adapter appears as an MST device with one downstream port "SST Sink device or Stream Sink in an MST Sink/Composite device" but no DPCD output for that port is shown. Maybe there's a bug in my code (need to adjust timeout? - I don't know - the AllRez output was cutoff before any error message) or mayber there's no DPCD for that port. I have a few other dumps (but all from the same person) of VMM7100 but none of them even had an ACK for the LINK_ADDRESS message. Maybe it would work if VMM7100 were directly connected instead of through MST hub. Maybe Linux can get more DPCD info. I've had no problem getting the DPCD from the downstream port of a VMM6100 connected directly to my Mac mini 2018.
- 4K100 1188MHz HDMI
- 4K120 1188MHz HDMI
- 4K60 594MHz HDMI
- 4K50 594MHz HDMI
- 4K60 529MHz