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Looking at that package photos, I come to conclusion that it will be way easier to use 384 bit bus for the aforementioned M3 Pro, than to use HBM2.

Package complexity will skyrocket with HBM2, whereas 384 - yes it increases complexity but its a straight forward package compared to adding interposer and HBM memory chips to the die.
 
It means: M3, M3 Pro, M3 Max, M3 Ultra. Exactly the same as M1 series.

And since M3 Pro is rumored to have 16 CPU cores, 8P/8E its logical that M3 Max would have 20 CPU cores: 12P/8E, and M3 Ultra - 40 CPU cores: 24P/16E.

The Pro and Max SoCs had the same number of CPU cores with the Max having double the GPU cores (not taking into account binned models of each). It is generally believed that the Pro and Max are identical in general design, with the Pro having the second set of GPU cores sliced off. And then Ultra is two Max using UltraFusion to bind them together.

So if "M3 Pro" has 12 CPU cores and 18 GPU cores, that would mean "M3 Max" would also have 12 CPU cores, but 38 GPU cores. And "M3 Ultra" would have 24 CPU cores and 76 GPU cores.
 
And since M3 Pro is rumored to have 16 CPU cores, 8P/8E its logical that M3 Max would have 20 CPU cores: 12P/8E, and M3 Ultra - 40 CPU cores: 24P/16E.

Gurman's numbers seem reasonable.

this:
M3 Pro (in testing):
  • 12 CPU cores (six high-performance cores/six power-efficient cores)
  • 18 graphics cores
  • 36GB of memory
and this:
If the M3 Max were to get a similar gain as the M2 Max (compared with the M1 Max), that would mean Apple’s next high-end MacBook Pro chip could come with up to 14 CPU cores and more than a whopping 40 graphics cores. Speculating even further, that would mean the M3 Ultra chip could top out at 28 CPU cores and sport more than 80 graphics cores, up from a 64-core limit on the M1 Ultra.

So the full M3 Pro/Max would be:
8 p-cores and 6 e-cores

And lower-the binned M3 Pro/Max would be:
6 p-cores and 6 e-cores

and the ultra would have 28 cores.

Where are all these huge numbers from?
 
The Pro and Max SoCs had the same number of CPU cores with the Max having double the GPU cores (not taking into account binned models of each). It is generally believed that the Pro and Max are identical in general design, with the Pro having the second set of GPU cores sliced off. And then Ultra is two Max using UltraFusion to bind them together.

So if "M3 Pro" has 12 CPU cores and 18 GPU cores, that would mean "M3 Max" would also have 12 CPU cores, but 38 GPU cores. And "M3 Ultra" would have 24 CPU cores and 76 GPU cores.
M3 Pro full die config is 8P/8E(16 CPU cores total) and 24 GPU cores. What Gurman found out is the base spec for the logic of the chip. It may, or may not be the base spec for the memory.
 
Are apple's press images wrong?

Don't they show the 32 GB maximum M2 Pro as having 4 memory packages:View attachment 2203266

and the 96GB maximum M2 Max chip has having 4, twice as large, packages:
View attachment 2203269

clearly with multiple memory dies inside them.

The M2 Pro image seems to be quite close. So I imagine the M2 Max is accurate as well.

1684346432535.png
 
The Pro and Max SoCs had the same number of CPU cores with the Max having double the GPU cores (not taking into account binned models of each). It is generally believed that the Pro and Max are identical in general design, with the Pro having the second set of GPU cores sliced off. And then Ultra is two Max using UltraFusion to bind them together.

So if "M3 Pro" has 12 CPU cores and 18 GPU cores, that would mean "M3 Max" would also have 12 CPU cores, but 38 GPU cores. And "M3 Ultra" would have 24 CPU cores and 76 GPU cores.
I think the numbers made more sense given the 14 CPU core rumour; but otherwise, basically yes.

There may be more GPU binning going on, so it is possible that the Ultras get slightly better binned chips with a few more GPUs working/turned on.

M3 Pro full die config is 8P/8E(16 CPU cores total) and 24 GPU cores. What Gurman found out is the base spec for the logic of the chip. It may, or may not be the base spec for the memory.
What is the source of rumours for 8p:8e instead of 8p:6e?
 
No, they don't. M2 package has 2 memory chips. M2 Chip has 128 bit bus. 2x64=128. M2 Pro has 256 bit bus, and M2 pro package has 4 memory chips. 4x64 = 256.

And there are 64 bit memory chips from Micron widely available(those are actually which Apple uses).
You are correct with regards to the M2 and M2 Pro. The M1 Pro package has two memory chips and M2 Pro has four. The M1 Max and M2 Max both have four. So, the M1 Pro max Ultra and the M2 Max use a custom memory package with a width of 128 bits.
 
Yes, the tricky question is the number of dies inside each package.
The number of dies per package and the bus width of the package. For the M2 Max, the bus width needs to be 128 bits per package to achieve the documented bus width of 512 bits.
 
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Apple marketing, and product segmentation philosophy. Yes, it can be 8P/6E. But from technical reasons - I don't believe that will be the case.
OK.

For the moment I'll put more weight in Gurman's rumours than our wishcasting :)

I keep my wishcasting for the M* Quadra package :)
 
OK.

For the moment I'll put more weight in Gurman's rumours than our wishcasting :)

I keep my wishcasting for the M* Quadra package :)
And I put more weight in information provided by... The Information. And their sources ;).

They have correctly predited what will happen, with M2 series, when everybody in the industry was expecting move to 3 nm process.
 
Well, we've already seen the Max "chiplet" used in the Ultra, and every rumour has suggested that Apple is trying to make the Quadra happen with it.

Every rumor? There is a rumor that Apple cobbled together a Quadra/Extreme and then looked at how much it would cost and figured that hardly anyone was going to buy it (pref/cost and size of willing target market). It flopped. They built several as a Frankenstein R&D project. They just aren't going to ship it in high volume.

If M2 Max follows the same basic shape as M1 Max ( which die shots indicate that it did). It has all the same basic physical failure modes as the first one did. It is not a good chiplet design. Tweaking the internal network , added more cores , and bloating the die even bigger ( to get in the way of InFO-LSI reticle limits) is not going to fix the root cause problems.

To cost effectively get to a quad die solution they need a new physical function composition.



I don't see any problem with scaling all those E-cores. Lots of efficient parallelization is fine.

It isn't so fine if competing in the market with x86 P cores. Adding more E-cores isn't going to get them into parity with Threadripper 7000. ( let alone TR 8000 or Intel w5-2500 series offerings in 2024-2025 ). Intel is only getting away with this "throw E cores at it" approach on the desktop line up. High end workstation land they aren't even trying that scheme at all. Mainly because it wouldn't work. The baseline is AMD TR now. Which does have a very good chiplet design foundation to leverage

At base price $6K and up that's what they really are competing with. Similar issue on GPU front 4090 and 7900xtx are really really holding their own against the competition.

Yes Apple pretends that nothing exists outside the Mac space. Throwing more E-cores makes it faster than a 4-5 year old W-3200. Whoop-tee-do , kick sand at multiple year old processor.

Plus macOS is capped by a 64 thread limit anyway. So the more E cores throw at the limit the less ground those cores will cover. The x86-64 stuff doesn't have the limit (Linux or Windows). It is not effectively using the limited resource have to spend here to try to keep up.


Apple bringing their super clunky chiplet to a real chiplet fight is a likely going to loose with high percentage of end users not caught up in some Apple cult blinders. It is like bringing a knife to a gun fight. It is better than nothing , but probably not competitive.



Some of the scaling might be weird, like: Thunderbolt Controllers. But really, who cares. It is way better than Apple trying to make a new SoC for the Mac Pro, which would be a colossal waste of money.

It just need to be grouped differently. They not need completely different P core cluster, E core cluster , NPU cluster GPU cluster , etc. They just need to aggregate them different. That is acutally a basic good design chiplet principal. Look for the proper aggregations. Apple really isn't. They are really trying to pound a round peg into a square hole. Here a laptop optimized, monolithic die ... make it work. There was no disaggregation thought there at all. It is designed to throughly monolithic and then slapping some side-car on the side after all the monolithic decisions are made.

If the whole economics of the UltraFusion subsystem is totally dependent on making 10's of millions users pay for a connector they can't possible use ( on mono laptop Max die deployments ) doing the quad doesn't make sense. If have to rob Perter to Paul to make the number work it is broke ( in both sense of the word). Can have an Ultra for a Mac Pro but that would probably be about it. Not to mention, probably wasting in aggregate hundreds of $16-20K wafers on users can't possible use. As the wafer costs go up pounding that round peg into a square hole is going to cost more money at the run rates is going to produce over time.

Apple just needs a desktop design constraints targeted die aggregations. Not new function units cluster, just a desktop aggregation. And then roll that out to a healthy chunk of the desktop contexts; not just the Mac Pro. That could be Mac Pro , the Mac Studio line up , M-series in a iMac Pro chassis , Mac-on-Card , etc. ( probably not the mini and probably not the iPad-on-a-stick iMac. ) . Find a substantive group of users who can get some utility out of the UtraFusion connector user and sell them a system so they can get a value add for their money. Imagine that (instead of grifting folks that can't use it). It would take some attention to detail but it could work. Yes Apple sell 75+% laptops , but if the laptop unit sales go up they can try to stop the slide a bit also growing the desktop sales. They could more effort into stopping the desktop shrinkage. ( besides paying incrementally better, competent attention to the Mini. )
 
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It isn't so fine if competing in the market with x86 P cores. Adding more E-cores isn't going to get them into parity with Threadripper 7000. ( let alone TR 8000 or Intel w5-2500 series offerings in 2024-2025 ). Intel is only getting away with this "throw E cores at it" approach on the desktop line up. High end workstation land they aren't even trying that scheme at all. Mainly because it wouldn't work. The baseline is AMD TR now. Which does have a very good chiplet design foundation to leverage

At base price $6K and up that's what they really are competing with. Similar issue on GPU front 4090 and 7900xtx are really really holding their own against the competition.

Yes Apple pretends that nothing exists outside the Mac space. Throwing more E-cores makes it faster than a 4-5 year old W-3200. Whoop-tee-do , kick sand at multiple year old processor.
You are not wrong that Apple could build a "better and more efficient" chiplet architecture for the Mac Pro, but I'm quite confident that they won't.

If Apple can't get the M* Quadra working, I think they will just ceed the market. Just like they are almost certainly going to ceed the >512 GB of RAM using market.

Apple has no interest in competing with the Threadripper 7000, TR 8000, or Intel w5-2500. If they can build just a powerful enough machine that they don't lose too many users, Apple is be happy.

Apple will continue to pretend that nothing exists outside of the Mac space at the high-end, because that is what Apple has been doing for 30 years. It isn't going to change now.

Unless Apple can figure out a minimal investment to get something "pro enough", they're not going to bother.

If that means that the most pro we get is a M* Ultra with lots of PCIe slots, then that is what Apple will give us.

I think it is pointless to expect Apple to invest heavily in a niche high-end of the niche mac market.

Maybe in 4-ish years we'll see a shift in their strategy, but I doubt it will impact the M3, M4, or M5.
 
I would like to point out one thing quickly.

What if what Gurman actually has found out is the top end M3 chip?

6P/6E, 192 bit bus, 12 GB per 64 bit memory chip and 18 GB cores.

Its very much possible. M2 Mac Mini already at the top end used 24 GB on a 128 bit bus which means 2x12 GB.

This is very much also a possibility.
 
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What if what Gurman actually has found out is the top end M3 chip?

6P/6E, 192 bit bus, 12 GB per 64 bit memory chip and 18 GB cores.
The M2 MBA is already sucking as much power is Apple can let it, and is easily the performance king at its power envelope, so I just don't see why apple would go all the way to a 50% increase in cores and 50% increase in memory bandwidth, and 60% more GPUs? Even with the new process, that has massive tradeoff consequences on a machine that is easily "fast enough" for the vast majority of its users.

Apple is very conservative, especially when they feel they're ahead.

Taking the M2 4:4:10 (p:e:gpu) to 4:6:10 is way more likely. Maybe it will get a couple GPUs to hit 4:6:12?

6:6:18 makes more sense for the base binned-down M3 Pro
8:6:20 then works for the binned-up M3 Pro
 
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What if what Gurman actually has found out is the top end M3 chip?

The top-end M3 without a suffix? No way. Way too much of a bump to be justified economically, and also too hard to pull off in terms of power budget.

Top-end M3 Max? Also not possible, because it would be a downgrade.

Top-end M3 Pro? Plausible.
 
I don't think we have heard any leaks about the M3 family CPU/GPU configurations. The Information back in late 2021 leaked the codenames ( Ibiza | Lobos | Palma ), but all they said was there would be a two-die top model with 40 CPU cores. I presume that was supposed to be the Mac Pro's chip and has been cancelled.
 
Are apple's press images wrong?

Don't they show the 32 GB maximum M2 Pro as having 4 memory packages:



View attachment 2203266


The M1 Pro

Apple_M1-Pro-M1-Max_M1-Pro_10182021_big_carousel.jpg.large_2x.jpg





The M2 Pro also got 'stuck' with no memory increase also so decent chance this is a logistical glitch that Apple was working around. Or the bloat on the M2 Pro die size needed an adjustment anyway on overall package logic board usage/placement ( M2 get wider so memory needed to get thinner. ).

Getting to TSMC N3 is has a good chance of reversing the die size bloat.
 
384 bit bus
I have been thinking about this and I have come around to agree with your forecast. M3 Pro will likely increase the memory bus 50% to 384 bits. Likewise, M3 Max will have 768 and Ultra 1536. If they upgrade to LPDDR5X then there will also be an 33% increase in speed to 8533 Mbps. So, M3 Pro bandwidth will be 400 MBps, M3 Max will be 800 MBps and M3 Ultra will be 1600 MBps. It is going be difficult to physically fit an extra device into the SiP without making the SiP larger.
 
What if what Gurman actually has found out is the top end M3 chip?

6P/6E, 192 bit bus, 12 GB per 64 bit memory chip and 18 GB cores.
Indeed, I think this is a good inference.

Even with the new process, that has massive tradeoff consequences on a machine that is easily "fast enough" for the vast majority of its users.
With the coming AI revolution I think we are not "fast enough" yet.
 
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