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I have been thinking about this and I have come around to agree with your forecast. M3 Pro will likely increase the memory bus 50% to 384 bits. Likewise, M3 Max will have 768 and Ultra 1536. If they upgrade to LPDDR5X then there will also be an 33% increase in speed to 8533 Mbps. So, M3 Pro bandwidth will be 400 MBps, M3 Max will be 800 MBps and M3 Ultra will be 1600 MBps. It is going be difficult to physically fit an extra device into the SiP without making the SiP larger.
They won't upgrade to LPDDR5X mainly because they use Micron's memory.

What source are you referring to?

this source.
 
Even with the new process, that has massive tradeoff consequences on a machine that is easily "fast enough" for the vast majority of its users.
I absolutely HATE this type of argument.

Apple users are justifying creating the best possible product possible on particular node, because "its fast enough for majority of users"?

No. It has to be as fast as possible within certain power budget, and within certain manufacturing cost envelope. Period. Thats what we should all expect from Apple.

Not some sort of justification that it is fast enough for majority of users.
 
they use Micron's memory
This tear down of the M2 Pro shows a SK hynix part number:

1684357680293.jpeg
 
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They won't upgrade to LPDDR5X mainly because they use Micron's memory.

This tear down of the M2 Pro shows a SK hynix part number:

There are also M1 Pro teardowns with Samsung memory (two 8GB modules). So it is clear that Apple has multiple memory suppliers (as would be expected).


Based on current teardowns, it appears that Apple has gone from two 8GB to four 4GB modules with the M2 Pro. Whether this is for improved memory performance or due to supply chain constraints on 8GB modules, I do not know.
 
I absolutely HATE this type of argument.



Not some sort of justification that it is fast enough for majority of users.
Well, it is a good thing I wasn’t making that argument.

My point was that the specs would fall inline with the power and thermal envelope of the fan cooled MBPs, and that was the tradeoff I was referring to. I don’t think the MBA chassis could handle it.

I *also* think Apple has no motivation to build it because of their existing performance, but that is an *explanation* not and excuse.

In general, if you are offended by a company not updating something because they economically don’t need to, I suggest running away from Apple as fast as you can and never looking back. Tim Cook’s Apple is a machine of “not spending money building something that isn’t going to make its investment back”.

When Apple says it is good at saying “no”. That means they know when to say “no” to stuff that won’t make enough money.
 
Well, it is a good thing I wasn’t making that argument.

My point was that the specs would fall inline with the power and thermal envelope of the fan cooled MBPs, and that was the tradeoff I was referring to. I don’t think the MBA chassis could handle it.

I *also* think Apple has no motivation to build it because of their existing performance, but that is an *explanation* not and excuse.

In general, if you are offended by a company not updating something because they economically don’t need to, I suggest running away from Apple as fast as you can and never looking back. Tim Cook’s Apple is a machine of “not spending money building something that isn’t going to make its investment back”.

When Apple says it is good at saying “no”. That means they know when to say “no” to stuff that won’t make enough money.
You said exactly the same thing as I did in that quoted post by you, in that part that was cut out by you.
 
You said exactly the same thing as I did in that quoted post by you, in that part that was cut out by you.

Well, “what if we increased cores and RAM by 50+%” is unlikely to fit the same power budget. Which raises the question: why? An Air would suddenly need a fan again, or at least more physical space. It would be faster, but also worse.
 
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Well, “what if we increased cores and RAM by 50+%” is unlikely to fit the same power budget. Which raises the question: why? An Air would suddenly need a fan again, or at least more physical space. It would be faster, but also worse.
Not entirely correct.

Apple still may be able to pack everything into the same thermal envelope: 15 or 35W. Suddenly going to 3nm process will not bring higher efficiency, and higher density to pack everything into the 15/35W thermal package?
 
Not entirely correct.

Apple still may be able to pack everything into the same thermal envelope: 15 or 35W. Suddenly going to 3nm process will not bring higher efficiency, and higher density to pack everything into the 15/35W thermal package?

Of course it’ll improve efficiency, but not by 50%. Likely less than 20%. Apple microarchitectures in recent years have averaged something like 20%, but that’s process node, better design and higher clock combined.
 
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Of course it’ll improve efficiency, but not by 50%. Likely less than 20%. Apple microarchitectures in recent years have averaged something like 20%, but that’s process node, better design and higher clock combined.
Well, Apple had two microarchitectures in recent years. M1 and M2 series...

They were the same microarchitectures, on the same N5 TSMC node.

And you should be concerned by die size, not power envelope. Low clocked but very wide architecture(which requires massive amounts of memory bandwidth...) is able to fit in very low thermal envelopes.

For me, the only thing that would be against the idea that the rumored specs are not for M3 is the die size, not the thermal envelope.


P.S. If Apple is readying/developing any M3 based Mac - thats exactly what dev logs should show, right now. Not necessarily M3 Pro.
 
Well, Apple had two microarchitectures in recent years. M1 and M2 series...

A9 through A16 had an average yoy single-thread improvement of 23%. Higher leaps have happened; most dramatically the 165% bump from A5 to A6, but they’re rare. So 50% from specs alone, then another x% from a better uarch design? Not unprecedented, but unlikely.

P.S. If Apple is readying/developing any M3 based Mac - thats exactly what dev logs should show, right now. Not necessarily M3 Pro.

Indeed, one would think. Perhaps M3 and M3 Pro are both coming this winter.
 
A9 through A16 had an average yoy single-thread improvement of 23%. Higher leaps have happened; most dramatically the 165% bump from A5 to A6, but they’re rare. So 50% from specs alone, then another x% from a better uarch design? Not unprecedented, but unlikely.

The proposed M3 change is BIGGER than the numbers above suggested. It was a 50% to 60% increase on CPU/GPU units; but these units are also 1 or 2 generations newer (likely moving from approx. the A15 to approx. the A17). That performance increase would be something more like 80% to 110% better than the M2. It is just not going to happen under the same thermal/power envelope in the M3 generation.

Indeed, one would think. Perhaps M3 and M3 Pro are both coming this winter.
Well, these machines have a long development cycle. If the M3 and M3 Pro are coming out in the next 6 to 12 months, they will be actively being tested now.
 
The proposed M3 change is BIGGER than the numbers above suggested. It was a 50% to 60% increase on CPU/GPU units; but these units are also 1 or 2 generations newer (likely moving from approx. the A15 to approx. the A17). That performance increase would be something more like 80% to 110% better than the M2. It is just not going to happen under the same thermal/power envelope in the M3 generation.
Its not entirely that big of a change with the move to completely new node.
 
Had a chance to read some other articles and got a link to what went out on bloomberg site. Gurman seems to be more so pointing at the increase of E cores in the "entry" line up more so than the core count total

M1 Pro 6P and 2E
M2 Pro 6P and 4E
M3 Pro 6P and 6E

the significant change there over time is the E cores; not the P cores. So not another two or four core P cluster coming... but probably another core E cluster (and pretty decent chance it is a full 4 core cluster). Spacewise that is much easier to do (lower cache die space overhead and much heavier AMX facility sharing, etc. ).

If Apple is chasing higher price points for the MBP then not only are the P cores binned in that M3 , but decent chance likely the E cores are binned there also. That the full die would be 16 core package. If Apple is trying to 'keep up with the Jones" in the x86-64 laptop processor land of core count wars , then might want to market 16 core laptops to compete with the 16 core Intel/AMD offerings. Folks doing superficial spec comparisons are just counting 'cores' ; not what type of cores.

I certainly hope Apple won't lower themselves to engaging in meaningless benchmarks and spec chasing. As to AMX, I think increasing the size of the AMX coprocessor per cluster is a better investment of silicon simply because it's easier to exploit from the software side.

The notion that this ArsTechnica article goes into:

"...
Though Apple has (mostly) ditched Intel, the two companies have taken a similar approach to improving their processors' performance in recent years: lean on architectural upgrades and small clock speed boosts to improve single-threaded performance on the big CPU cores while adding an increasing number of small high-efficiency cores to bolster multi-threaded performance for pro-level workloads that can use every CPU core you throw at them.
..."

I think this is a mischaracterisation on ArsTechnica's side. Intel's E-cores and Apples E-cores have completely different performance and power consumption characteristics and serve different purposes. Intel introduced small cores as an area-efficient way to boost multi-core throughput (at least for code with trivial thread dependencies). Apple's E-cores are there to conserve system energy and resources when executing low-priority or background task. They are obviously also used to improve throughout, but the contribution is rather minimal. Adding another E-core cluster to M2 would barely give you 10% improvements in trivial multicore benchmarks — is it really worth pursuing?

Of course, things change. We did see Apple dramatically improving the E-core performance between A14 to A16. If M3 ships with a new generation of E-core which offers 50-60% of P-core throughput while retaining their ridiculously low power consumption, it might become more interesting for certain class of computational tasks. We will see.

M1 and M2 Pro were both on N5 so the partial to full E core cluster was on a single node (grew die size bigger). N3 would be an opportunity to reverse the die size bloat that M2 generally rolled out across the line up.

Yeah, it's a huge problem. Looking at the die shots of M2 Pro and Max one can really see how Apple is struggling for space. I suppose this is the drawback of the SoC approach — their die has reached a size where improving performance comes at a very dear economical cost.

It also doesn't help that significant portion of an Apple Silicon SoC is occupied by SRAM which — from what I understand — doesn't scale that well with latest improvements in lithography. Maybe moving the cache to a separate stacked die would be a solution?

Second, I don't think Apple is using off-the-shelf generic LPDDR packaging.

They certainly don't. Someone counted the balls on the RAM modules Apple uses and there are around 3x more compared to the usual market offerings. It was speculated that most of these extra connectors are there to improve the electrical behavior of the system and enable ultra-low power consumption, but I don't know anything about these things.
 
I would like to point out one thing quickly.

What if what Gurman actually has found out is the top end M3 chip?

6P/6E, 192 bit bus, 12 GB per 64 bit memory chip and 18 GB cores.

Its very much possible. M2 Mac Mini already at the top end used 24 GB on a 128 bit bus which means 2x12 GB.

This is very much also a possibility.

Possible, but would suggest a fairly radical base architecture redesign. Until now, Apple has been grouping their CPU cores into clusters of four cores. 6P cores would mean a different core organisation. Already this makes me a bit sceptical.

Plus, 18 GPU cores in the base M3? That's sounds unlikely at best.
 
Possible, but would suggest a fairly radical base architecture redesign. Until now, Apple has been grouping their CPU cores into clusters of four cores. 6P cores would mean a different core organisation. Already this makes me a bit sceptical.
It's basically the same as with the M1 and M2

M1 Pro (down binned) = 6:2 (p:e)
M1 Pro (up binned) = 8:2

M2 Pro (down binned) = 6:4
M2 Pro (up binned) = 8:4

M3 Pro (down binned) = 6:6
M3 Pro (up binned) = 8:6

Plus, 18 GPU cores in the base M3? That's sounds unlikely at best.
Absolutely unlikely.
 
It's basically the same as with the M1 and M2

M1 Pro (down binned) = 6:2 (p:e)
M1 Pro (up binned) = 8:2

M2 Pro (down binned) = 6:4
M2 Pro (up binned) = 8:4

M3 Pro (down binned) = 6:6
M3 Pro (up binned) = 8:6

Well, it depends on what you mean. Is that alleged 6+6 configuration actually an 8+6 die with two P-cores disabled or is it an actual 6+6 die? One confusing aspect of this tread is that seem to be talking about binned M1/M2 series as different chips, but it's still the same chip, just with some cores turned off.

And 6E cores is still weird. Are these actually two E-clusters with two cores disabled or are you suggesting some other cluster configuration?
 
Well, it depends on what you mean. Is that alleged 6+6 configuration actually an 8+6 die with two P-cores disabled or is it an actual 6+6 die? One confusing aspect of this tread is that seem to be talking about binned M1/M2 series as different chips, but it's still the same chip, just with some cores turned off.

The M1 and M2 were both 8 p-core dies with 2 down-binned off, and Gurman and I both suspect that Apple will just do the same with the M3, but he didn't have anything definitive. It seems unlikely that the M3 Pro will have 2 fewer performance cores than the M2 Pro, so the 6 makes sense to be a down-binned SoC.

Of course, the different M1/M2/M3 Pro/Max chips are all the same single chip design; just with either bits cut off, or parts disabled. That is apparently how Apple is keeping its chip design/manufacturing costs down?

And 6E cores is still weird. Are these actually two E-clusters with two cores disabled or are you suggesting some other cluster configuration?
I don't see why Apple would bother down-binning e-cores. They're fewer transistors (vs p-cores), and wouldn't have much of a performance delta. For that, time will tell. The M2 -> M3 will probably be a bigger change than M1 -> M2.
 
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The M1 and M2 were both 8 e-core dies with 2 down-binned off

You mean 8 P-cores, right?

Of course, the different M1/M2/M3 Pro/Max chips are all the same single chip design; just with either bits cut off, or parts disabled. That is apparently how Apple is keeping its chip design/manufacturing costs down?

Base M1/M2 are unique dies. With M2 Pro/Max it’s more interesting - they share the same basic die design, but M2 Pro is cropped (missing the bottom parts with the GPU cores). Apple has an interesting patent about taping out different cores from the same design. I don’t know if they already use it for M1 Pro/Max.

Of course, all these cores reuse the same components like CPU/GPU clusters etc. As to binning, well, that’s just profit maximization. Selling some models with cores disabled allows them to charge more for the fully enabled chip.

I don't see why Apple would bother down-binning e-cores. They're fewer transistors (vs p-cores), and wouldn't have much of a performance delta. For that, time will tell. The M2 -> M3 will probably be a bigger change than M1 -> M2.

Right, but 6E cores is still weird. What’s the cluster configuration here?
 
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Possible, but would suggest a fairly radical base architecture redesign. Until now, Apple has been grouping their CPU cores into clusters of four cores. 6P cores would mean a different core organisation. Already this makes me a bit sceptical.

Plus, 18 GPU cores in the base M3? That's sounds unlikely at best.
Does it sound unlikely because its hard to believe in it(subjective), or because its impossible on a new node with 0.6x density of N5(objective)? :)
 
Does it sound unlikely because its hard to believe in it(subjective), or because its impossible on a new node with 0.6x density of N5(objective)? :)

Even if we are talking about shrinking the M2 cores to N5, I very much doubt that the density improvements alone would allow you to double the clusters for comparable die size. But surely the new chips will come with new features which need more space as well. Not to mention that more GPU cores would need a larger on-chip network, more cache, and more RAM bandwidth to support them.
 
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Surely sticking to 8P cores and just adding 2E cores each generation isn’t sustainable. Especially since many pro apps, like Logic Pro don’t even use the E cores.

If the M3 Pro can get to 10P cores at least it gives some of us M1 Pro users a reason to upgrade.

Otherwise it’s likely to be another year on year decrease in sales isn’t it?
 
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