Yep, let's do this. Let's start the speculation of all things M3 generation.
Let's discuss what we believe the M3 generation will bring. From:
- process;
- core count;
- improvements to core architecture;
- improvements to GPU architecture;
- changes to RAM and subsystem;
- cache types/sizes;
- will it support hardware ray-tracing;
- changes to media encoders;
- clock speeds;
- TDP versus performance tradeoffs.
-------
My thoughts to get us started:
------.
If base M3 has the same core count as M2:
I have seen some rumours suggest the M3 base chip will offer the same 8 core / 10 core layout. If that's the case, then I can assume a couple of things:
- higher clock speed by ~10-15%
- smaller die size, given the smaller manufacturing process
- slightly lower power consumption
- allows for slightly thinner/smaller devices
Note, if the GPU cores are to include hardware RT features, then those features may require additional die real estate, which might negate the die size shrinkage.
If Apple makes use of higher silicon density:
Apple might choose to keep the die a similar size, and compensate by adding a little more to the core count. I imagine this would maintain symmetry, so perhaps a
M3: 6p + 4e CPU / 12 Core GPU / 3.85GHz nominal clock speed
One would assume then:
M3 Pro: 14 core (10p + 4e) CPU / 22 Core GPU / 3.85GHz nominal clock speed
M3 Max: 14 core (10p + 4e) CPU / 44 Core GPU / 3.95GHz high power clock speed
M3 Ultra: 28 core (20p + 8e) CPU / 88 Core GPU / 3.95GHz high power clock speed
Memory
All utilising LPDDR5X for RAM, an upgrade over the LPDDR5 currently used. Unlikely to see LPDDR5T, or LPDDR6. Still, LPDDR5X offers a big jump in performance of ~30-50%. 6400MT/s vs 8533MT/s, while utilising 20% less power. see: https://en.wikipedia.org/wiki/LPDDR
It seems that with process node shrinks, it opens up a bunch of choices for the silicon designer. More cores, more complex cores, or smaller die? Higher clock speed? Lower TDP? Focus on any one of those with large improvements, or focus on two or more with smaller improvements.
Keen to hear your thoughts and have fun speculating! I'd love to hear from people with more knowledge in the subsystem and other chip design areas like cache etc.
Let's discuss what we believe the M3 generation will bring. From:
- process;
- core count;
- improvements to core architecture;
- improvements to GPU architecture;
- changes to RAM and subsystem;
- cache types/sizes;
- will it support hardware ray-tracing;
- changes to media encoders;
- clock speeds;
- TDP versus performance tradeoffs.
-------
My thoughts to get us started:
------.
If base M3 has the same core count as M2:
I have seen some rumours suggest the M3 base chip will offer the same 8 core / 10 core layout. If that's the case, then I can assume a couple of things:
- higher clock speed by ~10-15%
- smaller die size, given the smaller manufacturing process
- slightly lower power consumption
- allows for slightly thinner/smaller devices
Note, if the GPU cores are to include hardware RT features, then those features may require additional die real estate, which might negate the die size shrinkage.
If Apple makes use of higher silicon density:
Apple might choose to keep the die a similar size, and compensate by adding a little more to the core count. I imagine this would maintain symmetry, so perhaps a
M3: 6p + 4e CPU / 12 Core GPU / 3.85GHz nominal clock speed
One would assume then:
M3 Pro: 14 core (10p + 4e) CPU / 22 Core GPU / 3.85GHz nominal clock speed
M3 Max: 14 core (10p + 4e) CPU / 44 Core GPU / 3.95GHz high power clock speed
M3 Ultra: 28 core (20p + 8e) CPU / 88 Core GPU / 3.95GHz high power clock speed
Memory
All utilising LPDDR5X for RAM, an upgrade over the LPDDR5 currently used. Unlikely to see LPDDR5T, or LPDDR6. Still, LPDDR5X offers a big jump in performance of ~30-50%. 6400MT/s vs 8533MT/s, while utilising 20% less power. see: https://en.wikipedia.org/wiki/LPDDR
It seems that with process node shrinks, it opens up a bunch of choices for the silicon designer. More cores, more complex cores, or smaller die? Higher clock speed? Lower TDP? Focus on any one of those with large improvements, or focus on two or more with smaller improvements.
Keen to hear your thoughts and have fun speculating! I'd love to hear from people with more knowledge in the subsystem and other chip design areas like cache etc.
Last edited:
