M4+ Chip Generation - Speculation Megathread [MERGED]

[Confused-User]

Wow ... unfortunately Geekbench AI does not yet have a search bar that I can see and all the first 100 pages of results on display are from the last few days, so I can't see if any other processors experienced a similar jump in performance from iOS17 to 18 or from Sonoma to Sequoia.

AFAICT, Geekbench's search is utterly broken, and has been for a long time (if not always).

Searching for "Macbook air m2" works as expected. Searching for "Macbook air m3" produces no results. I have encountered many similar examples. It's really irritating.

Yes, I know that's not directly responsive, sorry. Just ran into this again though so I'm spouting off. :-/

 

[Pressure]

AFAICT, Geekbench's search is utterly broken, and has been for a long time (if not always).

Searching for "Macbook air m2" works as expected. Searching for "Macbook air m3" produces no results. I have encountered many similar examples. It's really irritating.

Yes, I know that's not directly responsive, sorry. Just ran into this again though so I'm spouting off. :-/

That's because you need to search for the model number string.

The MacBook Air M3 is Mac15,12 (13.6-inch) and Mac15,13 (15-inch).

 

[Confused-User]

That's because you need to search for the model number string.

The MacBook Air M3 is Mac15,12 (13.6-inch) and Mac15,13 (15-inch).

That's ridiculous. Which is not to say that you're wrong. But it is utterly ridiculous. (And why does "macbook air m2" work fine then??)

 

[Pressure]

That's ridiculous. Which is not to say that you're wrong. But it is utterly ridiculous. (And why does "macbook air m2" work fine then??)

Ask Primate Labs, the developers of these applications 🤷🏼‍♂️

 

[mr_roboto]

Agreed, they could and that would be fine. But again... fusing off some cache would be a VERY weird choice. Fusing off a GPU or CPU core is a very common choice, and they've done that a bunch of times. This, not so much. Or I should say, never at all, and I'm not aware of any other CPU maker doing that either (fusing off cache).

I know this was an old post and the thread has moved past, but actually, it's very common. Intel, in particular, does it a lot in L2 caches to help differentiate "3", "5", "7", and "9" models. When they do it, usually both sevens and nines get the full size L2. There have been many confirmed cases where it's the same tapeout across low and high end parts, so it really is binning (or, more accurately, yield enhancement).

How they do it in caches is quite simple: A set associative cache is a lot like several direct mapped caches with some extra glue logic to make them work together. Each of these sub-caches is often referred to as a "way". So, you just make that glue logic capable of disabling entire ways, based on how some fusible links are blown by the factory.

In general SRAMs are one of the best structures to use for yield enhancement. In a CPU they're typically the largest fraction of the floorplan of any circuit type, so statistically, most point defects land in SRAM. In cases where you don't want some fraction of the products sold to have less capacity in a given SRAM, it's still very possible to build in repairability: split such SRAMs into several subarrays, provide N+m subarrays where N is the number required for nominal capacity, and provide the glue logic to assemble any combination of N subarrays into a single logical memory.

How much die area you want to burn on repairability is a complicated question, but every large chip built on an advanced node does it. Helps yield too much.

All that said, 12MiB vs 24MiB in the SLC alone is a stark size difference. Non-pro iPhones should sell in way higher volume than Pro, and I would be surprised if Apple's happy burning 12MiB worth of die area in all those low-end parts. That's the kind of thing which can lead to a separate tapeout with genuinely more of SLC SRAM and all the other things that differentiate A18 Pro from A18.

 

[Confused-User]

I know this was an old post and the thread has moved past, but actually, it's very common. Intel, in particular, does it a lot in L2 caches to help differentiate "3", "5", "7", and "9" models. When they do it, usually both sevens and nines get the full size L2. There have been many confirmed cases where it's the same tapeout across low and high end parts, so it really is binning (or, more accurately, yield enhancement).

How they do it in caches is quite simple: A set associative cache is a lot like several direct mapped caches with some extra glue logic to make them work together. Each of these sub-caches is often referred to as a "way". So, you just make that glue logic capable of disabling entire ways, based on how some fusible links are blown by the factory.

I was well aware of this (cache size differences), but my impression was that cache slices were tied much more tightly to individual cores, so that they were always enabled or disabled along with an individual core. This was reinforced by the "fact" that all the different chips had the same number of ways. But apparently they don't, so, thank you, now I know better.

In general SRAMs are one of the best structures to use for yield enhancement. In a CPU they're typically the largest fraction of the floorplan of any circuit type, so statistically, most point defects land in SRAM. In cases where you don't want some fraction of the products sold to have less capacity in a given SRAM, it's still very possible to build in repairability: split such SRAMs into several subarrays, provide N+m subarrays where N is the number required for nominal capacity, and provide the glue logic to assemble any combination of N subarrays into a single logical memory.

How much die area you want to burn on repairability is a complicated question, but every large chip built on an advanced node does it. Helps yield too much.

Maynard wrote about this a few days ago too (possibly some other venue though).

All that said, 12MiB vs 24MiB in the SLC alone is a stark size difference. Non-pro iPhones should sell in way higher volume than Pro, and I would be surprised if Apple's happy burning 12MiB worth of die area in all those low-end parts. That's the kind of thing which can lead to a separate tapeout with genuinely more of SLC SRAM and all the other things that differentiate A18 Pro from A18.

That is exactly the point I was trying to make. It's not proof, but it's very suggestive.

 

[smidgeondutchrabbit]

is the m4 chip going to have 18 cores or more than 18 cores. i dont think it will have 18 cores and 42 graphics cored because that coesnt follow apples pattern like how iphones go by 128 256 512 and 1tb

 

[tenthousandthings]

is the m4 chip going to have 18 cores or more than 18 cores. i dont think it will have 18 cores and 42 graphics cored because that coesnt follow apples pattern like how iphones go by 128 256 512 and 1tb

There is no increase in transistor density between N3 and N3E, there’s actually a slight decrease. So M4 could have the same number of cores as M3. That said, the one leak about this says M4 is going up to 10/10 (from 8/10) so maybe everything is a bit larger, so 20/40 in M4 Max isn’t inconceivable.

 

[tenthousandthings]

Die shots exist:

Apple A18 & A18 pro die shot - ChipWise

Apple 18 and A18pro die shot analysis

chipwise.tech

 

[Confused-User]

This is fascinating! I think it makes it much more likely that we really are looking at two different chips, though as we discussed a few days ago it's not definitive proof.

And with the die shots, now we know... they really are two different chips, and the A18 is not a cut-down A18 pro.

 

[Xiao_Xi]

https://twitter.com/i/web/status/1841074082898452538

 

[MayaUser]

so making a18 different and to make some sort of budget sense it will be used in many devices base iPhone 16, e.g. 2025 iPhone SE, new iPads, Apple TV, Home Pod erc?!

 

[tenthousandthings]

And with the die shots, now we know... they really are two different chips, and the A18 is not a cut-down A18 pro.

I found the info [!] in the article about InFO-PoP interesting, here’s the quote:

“The packaging technique has remained consistent over the years, with TSMC utilizing the InFO-PoP (Integrated Fan-Out Package-on-Package) method. This approach stacks the DRAM package directly on top of the SoC die and incorporates high-density RDL (Redistribution Layers) along with TIV (Through InFO Via) to reduce the overall chip size while ensuring strong thermal and electrical performance. A key advantage of this technique is its flexibility, as the DRAM package can be easily swapped or replaced.”

Not that it tells us anything useful about M4 Ultra, it doesn’t, but it does suggest Apple’s deployment of InFO-LSI (now called InFO-oS) for UltraFusion was informed [!] by their experience packaging iPhone/iPad silicon.

 

[Alameda]

Base stats:

• 40 high-performance cores
• 20 high-efficiency cores
• 100-core GPU
• 80-core Neural Engine
• 8GB Unified memory

Twenty-five years ago, I was a marketing director at a semiconductor company, and we worked tirelessly on white papers to describe future software and use cases to justify faster processors.

It’s a game. There are always scientists and engineers who come up with reasons for using the fastest possible computing hardware, but for consumers of packaged software, it’s a game.

We have been using Microsoft Office to write letters, emails, create spreadsheets and presentations for 30 years now. It’s always worked fine all this time. And twenty-five years ago, we ran focus groups asking people what additional features they wanted in their Office software, and over 95% of feature requests were for features the software already had.

Yes, Internet speeds have soared and we’ve had considerable improvements, but this obsession over “needing” the fastest and the most memory is nonsense that marketing people invent. As in, Management literally sits around with Engineering figuring out, “How do we create software that needs more processing power to use?” And people still fall for it, even though systems are so fast, the marketing people can’t even figure out how to describe the speed of new processors anymore.

Soon, MS Office will feature, “Tell Word what letter to write for you,” and then, “Tell Word which letter to read for you and write the reply for you.” Then it will be, “Tell HR who’s actually doing any work, fire everybody else, and keep their computers.”

 

[MRMSFC]

Twenty-five years ago, I was a marketing director at a semiconductor company, and we worked tirelessly on white papers to describe future software and use cases to justify faster processors.

It’s a game. There are always scientists and engineers who come up with reasons for using the fastest possible computing hardware, but for consumers of packaged software, it’s a game.

We have been using Microsoft Office to write letters, emails, create spreadsheets and presentations for 30 years now. It’s always worked fine all this time. And twenty-five years ago, we ran focus groups asking people what additional features they wanted in their Office software, and over 95% of feature requests were for features the software already had.

Yes, Internet speeds have soared and we’ve had considerable improvements, but this obsession over “needing” the fastest and the most memory is nonsense that marketing people invent. As in, Management literally sits around with Engineering figuring out, “How do we create software that needs more processing power to use?” And people still fall for it, even though systems are so fast, the marketing people can’t even figure out how to describe the speed of new processors anymore.

Soon, MS Office will feature, “Tell Word what letter to write for you,” and then, “Tell Word which letter to read for you and write the reply for you.” Then it will be, “Tell HR who’s actually doing any work, fire everybody else, and keep their computers.”

If Word uses the same voice recognition that Cortana does, I’m not worried.

 

[Alameda]

If Word uses the same voice recognition that Cortana does, I’m not worried.

I can type faster than i can talk.

 

[Confused-User]

so making a18 different and to make some sort of budget sense it will be used in many devices base iPhone 16, e.g. 2025 iPhone SE, new iPads, Apple TV, Home Pod erc?!

You can't draw that conclusion. But it may still be true.

The difference in die area between the A18 and the A18Pro is about 15%. They sell enough iPhones that it's worth it to have two different dies just for that. On the other hand, after several years they finally have their base model back on the most advanced process and design. They may see that as a good baseline. No way to know until the products appear.

I'd bet money it'll be in the new SE, and in any new-gen base (non-air) iPad that ships soon. Other than that, I'm not making a guess.

 

[Chuckeee]

I can type faster than i can talk.

Meeeeeeeee tooooooooo

 

[Kronsteen]

I can type faster than i can talk.

I sometimes think I can type faster than I can think …. 🤠

 

[MayaUser]

so bottom line you guys think and talk slower than you type
Back on topic
I really hope we can see the M4 Pro and Max family this month

 

[krell100]

Imagine if there's just one more thing and voila, an M4 ultra with updated Studio/Pro...

 

[MayaUser]

Imagine if there's just one more thing and voila, an M4 ultra with updated Studio/Pro...

Imagine imagine....M4 Ultra in Studio/Pro an 32" iMac with M4 Pro/Max in it with 4tb4, sd card, high beam headpohone jack and so on...
Its pretty clear the big chances for the Ultra for Studio/Pro will be next year

 

[MRMSFC]

I can type faster than i can talk.

I stutter really badly so I prefer typing anyway.

Back on topic. I’m super excited to see what the M4 Pro/Max is like.

Imagine imagine....M4 Ultra in Studio/Pro an 32" iMac with M4 Pro/Max in it with 4tb4, sd card, high beam headpohone jack and so on...
Its pretty clear the big chances for the Ultra for Studio/Pro will be next year

I hope they’ll have 4 tb ports. I’m disappointed the Studio Display only has USB. For the price it should have been a TB4 hub.

 

[Kronsteen]

I stutter really badly so I prefer typing anyway.

Back on topic. I’m super excited to see what the M4 Pro/Max is like.


I hope they’ll have 4 tb ports. I’m disappointed the Studio Display only has USB. For the price it should have been a TB4 hub.

Good point. I have needed a new display for a while (my newish MBP 16” has convinced me just how bad my really old Dell screen was), so I succumbed to temptation and bought a Studio display — I just couldn’t persuade myself to spend so much more the XDR Pro when it’s been out for five years — but it’s a little annoying that the Studio display is only USB. So multiple TB4 on a Mac Studio M4 Pro/Max/Ultra would be good.

What I’d really like to see, though, is a ‘base’ M4 Ultra with 64 (rather than 60) or more GPU cores. I’m not sure that’s terribly likely, though. Having to pay an extra UKP 1,000 to get to 76 GPU cores seemed to me a bit of a swizz.

 

[tenthousandthings]

Good point. I have needed a new display for a while (my newish MBP 16” has convinced me just how bad my really old Dell screen was), so I succumbed to temptation and bought a Studio display — I just couldn’t persuade myself to spend so much more the XDR Pro when it’s been out for five years — but it’s a little annoying that the Studio display is only USB. So multiple TB4 on a Mac Studio M4 Pro/Max/Ultra would be good.

What I’d really like to see, though, is a ‘base’ M4 Ultra with 64 (rather than 60) or more GPU cores. I’m not sure that’s terribly likely, though. Having to pay an extra UKP 1,000 to get to 76 GPU cores seemed to me a bit of a swizz.

I’d be surprised if they don’t at least go to 80 GPU cores for the flawless Ultra (following M3), so a corresponding bump (not following M3) for the binned Ultra to 64 GPU cores isn’t too much to hope for.