Do you know what the software FP64 performance of M1 is? I’m just curious.
No idea. But a double float technique can be usually implemented at the coast of 4-5 FP32 operations.
How I remember it being explained was that DLSS and any AA technique that required information on the whole scene/larger-than-a-tile area effectively require a second rendering pass for TBDR GPUs. I’ll see if I can dig up the link.
That’s correct. And that’s why neither have any advantage here. Of course, a bandwidth constrained GPU like base M1 will have more trouble.