What are the benefits of Apple switching to Arm Macs?

[dmccloud]

This still doesn’t explain why Apple wouldn’t use their own good processors regardless of intel.

Common sense would dictate that if you are going to replace Intel with your own silicon, your parts better be able to run at a minimum on par with their CPUs before making the switch. If Apple was to switch to their own CPUs but the new MBP wound up with performance equivalent to the current MBA, that would be considered a massive failure by any rational person.

 

[vigilant]

Just like Apple, AMD uses TSMC to produce their processors rather than manufacturing them in house. Additionally, making such a purchase while deep in bed with Intel would have likely led to issues between the two companies.

I don’t think I completely agree with your second item.

I’d wager that Apple had some form of “walk away” clause in their agreement with Intel.

 

[Waragainstsleep]

I don’t think I completely agree with your second item.

I’d wager that Apple had some form of “walk away” clause in their agreement with Intel.

I think there's an issue with anyone purchasing AMD regarding AMD's license of x86 from Intel. Specifically I believe Intel can revoke it if AMD is purchased.

 

[Boil]

I think there's an issue with anyone purchasing AMD regarding AMD's license of x86 from Intel. Specifically I believe Intel can revoke it if AMD is purchased.

I want to say that there is a similar thing the other way; if Intel gets sold, they lose their x64 license they have from AMD?

Mutually assured destruction...!

 

[Waragainstsleep]

I want to say that there is a similar thing the other way; if Intel gets sold, they lose their x64 license they have from AMD?

Mutually assured destruction...!

I'm guessing you mean AMD64? x86 belongs to Intel doesn't it?

 

[vigilant]

I think there's an issue with anyone purchasing AMD regarding AMD's license of x86 from Intel. Specifically I believe Intel can revoke it if AMD is purchased.

You could very well be write. I thought Intel for today is forced to license the instruction set to one other chip company? I maybe misremembering that though.

 

[cmaier]

Just keep the timeline in mind.

Apple went to an Architecture License specifically to design their own SOCs including the core microarchitectures. Meanwhile, they went on a poaching spree that especially targeted Intel and to a lesser extrent AMD and Qualcomm.

I don’t think they poached intel very much. I see a lot of my former colleagues from AMD, Exponential/EVSX/Intrinsity, folks from PA Semi/DEC, etc. Not a lot of Intel people.

 

[cmaier]

You could very well be write. I thought Intel for today is forced to license the instruction set to one other chip company? I maybe misremembering that though.

I think you are thinking of when IBM insisted that Intel do that, many years ago, so they’d have a second source.

For what it’s worth, there may still be other licenses floating around. IBM may still have its own fab license (without fabs , or maybe that fab license was inherited by global foundries. Via may have a license. Etc.

 

[vigilant]

It’s been a long time since I dug into it. I just remember the anti-trust part.

Via did it for a while after Cyrix disappeared.

Chip history is fun, but it’s so easy to get things mixed up going that far back

 

[Chozes]

Expect huge possible changes in the laptop market.

Lots of change has slowed due to Intel which everyone around here speaks about.
Maybe Nvidia may buy out ARM.
AMD have made great performance CPU but cant control other factors and lack Intel's clout.
Apple can innovate more with better chips. Expect good synergy between custom chips and the new CPU. Also the performance should be better for most users.

The biggest factor however is freedom to design around better chips. I more custom designs and ideas from Apple. Let's enjoy the ride.

 

[JMacHack]

well said. Craig also said in interviews that Apple wants the macOS to stay open.

It bugs me a bit when people push the "lock-down" narrative. All it takes is a little bit of critical thinking to debunk it, yet it's persistent.

 

[guzhogi]

They will have much better battery life than Intel Macs (and PCs).

Lower power consumption, definitely. Better battery life, eh, maybe. "Better battery life" assumes same size battery. Considering Apple's love of thinness, they might include smaller batteries. Smaller batteries + lower power consumption = about the same battery life. To be fair, who really knows until Apple actually releases it?

 

[deconstruct60]

It bugs me a bit when people push the "lock-down" narrative. All it takes is a little bit of critical thinking to debunk it, yet it's persistent.

It is somewhat of a broken analog clock prediction. Twice a day it is the right time.
Same thing with yearly Late winter - early Spring predictions of "Mac model X" being the primary big hardware introduction at WWDC . " Just wait for WWDC it is going to be huge.... blah , blah ,blah "

We'll see how the Apple Silicon systems pan out on alternative boot options but it looks like will probably get a "broken clock" match this round if running on top of a "Mac" hypervisor is the only path to another OS. That will be a new limitation. Even if it is not a complete lock down it still going to draw large amounts of moaning and groaning from the "lock down .. just around the corner" conspiracy group.

Cranking up the boot and OS kernel security is going to close off more options.

P.S. there is also two levels of "open". The normal user open and the low level hacker open. It is the latter that makes more disproportionate noise about the issues. Being able to get non Mac App store apps isn't going away. But folks second guessing internal kernel parameters is.

 

[RandomDSdevel]

-----Won't you still be able to set NVRAM variables (including with the 'nvram' command in Terminal) and otherwise influence some boot options? '/Library/Preferences/SystemConfiguration/com.apple.Boot.plist,' presuming that's still around, is outside the hidden system partition, as far as I can recall off the top of my head, and thus still editable by end users.

 

[vigilant]

It bugs me a bit when people push the "lock-down" narrative. All it takes is a little bit of critical thinking to debunk it, yet it's persistent.

Has it been your experience that critical thinking is common?

 

[vigilant]

It is somewhat of a broken analog clock prediction. Twice a day it is the right time.
Same thing with yearly Late winter - early Spring predictions of "Mac model X" being the primary big hardware introduction at WWDC . " Just wait for WWDC it is going to be huge.... blah , blah ,blah "

We'll see how the Apple Silicon systems pan out on alternative boot options but it looks like will probably get a "broken clock" match this round if running on top of a "Mac" hypervisor is the only path to another OS. That will be a new limitation. Even if it is not a complete lock down it still going to draw large amounts of moaning and groaning from the "lock down .. just around the corner" conspiracy group.

Cranking up the boot and OS kernel security is going to close off more options.

P.S. there is also two levels of "open". The normal user open and the low level hacker open. It is the latter that makes more disproportionate noise about the issues. Being able to get non Mac App store apps isn't going away. But folks second guessing internal kernel parameters is.

I’d encourage you to give the hypervisor.framework a try.

Parallels has been vindictive with the way it’s constantly stealing resources even when VMs are in the background.

Parallels Desktop Lite on the Mac App Store to me is far superior to the way Parallels Desktop works. My machine is SOOOO much stabler with it.

 

[burgerrecords]

Common sense would dictate that if you are going to replace Intel with your own silicon, your parts better be able to run at a minimum on par with their CPUs before making the switch.

Not really. Lot's of reasons to use your own chips even if absolute performance for certain use cases isn't superior. In fact i switched to AMD from intel on my desktop because it was cheaper and cooler even though in absolute terms intel is faster.

 

[joema2]

Intel right around the Core line of products started basically taking in CISC instructions, and creating Micro-Ops that to my understanding were more RISC in nature. Is that being taken into consideration with what you wrote?...

This actually happened with the Pentium Pro in 1995 and was later adopted for Core, plus AMD uses the technique. This means both Intel and AMD CPUs are internally RISC-like. The more dense CISC instructions actually reduce bus bandwidth and make more efficient use of instruction and data caches.

It may be for these reasons that AMD's server/workstation EPYC CPUs tend to be faster than the RISC POWER9: https://www.phoronix.com/scan.php?page=article&item=rome-power9-arm&num=1

Since both Intel and AMD CPUs are really covert RISC machines, and even more pure RISC machines like POWER9 are highly complex CPUs using out-of-order superscalar speculative execution, the original RISC advantages might seem to no longer apply. Contemporary RISC and CISC CPUs are both incredibly complex, and there is nothing "reduced" about either of them.

We must also keep in mind as ARM-instruction-set CPUs scale upward, it is not those vs Intel, but those vs x86 (which includes AMD from whom Intel licenses the x64 instruction set which was developed solely by AMD). IOW if there is an ARM or Apple Silicon advantage it will be manifest against x86 in general which includes AMD.

Ever since the Pentium Pro and succeeding x86 CPUs seemed to nullify the RISC performance advantage, for decades the traditional view was process and fabrication technology was the differentiator, not the instruction set. The corollary was if ARM could ever scale up to Xeon or EPYC levels it would burn just as much power as x86.

However in recent years Apple's Ax CPU development has been on an improved power/performance curve which currently seems to be holding. Already the A12Z CPU in an iPad Pro is roughly as fast as the 4.2Ghz quad-core Intel Kaby Lake CPU in a 2017 iMac 27. Nobody has yet authoritatively explained how this was achieved, when all previous RISC designs failed to compete. It is unlikely not simply due to the ARM instruction set itself or traditional RISC "advantages".

 

[cmaier]

This actually happened with the Pentium Pro in 1995 and was later adopted for Core, plus AMD uses the technique. This means both Intel and AMD CPUs are internally RISC-like. The more dense CISC instructions actually reduce bus bandwidth and make more efficient use of instruction and data caches.

It may be for these reasons that AMD's server/workstation EPYC CPUs tend to be faster than the RISC POWER9: https://www.phoronix.com/scan.php?page=article&item=rome-power9-arm&num=1

Since both Intel and AMD CPUs are really covert RISC machines, and even more pure RISC machines like POWER9 are highly complex CPUs using out-of-order superscalar speculative execution, the original RISC advantages might seem to no longer apply. Contemporary RISC and CISC CPUs are both incredibly complex, and there is nothing "reduced" about either of them.

We must also keep in mind as ARM-instruction-set CPUs scale upward, it is not those vs Intel, but those vs x86 (which includes AMD from whom Intel licenses the x64 instruction set which was developed solely by AMD). IOW if there is an ARM or Apple Silicon advantage it will be manifest against x86 in general which includes AMD.

Ever since the Pentium Pro and succeeding x86 CPUs seemed to nullify the RISC performance advantage, for decades the traditional view was process and fabrication technology was the differentiator, not the instruction set. The corollary was if ARM could ever scale up to Xeon or EPYC levels it would burn just as much power as x86.

However in recent years Apple's Ax CPU development has been on an improved power/performance curve which currently seems to be holding. Already the A12Z CPU in an iPad Pro is roughly as fast as the 4.2Ghz quad-core Intel Kaby Lake CPU in a 2017 iMac 27. Nobody has yet authoritatively explained how this was achieved, when all previous RISC designs failed to compete. It is unlikely not simply due to the ARM instruction set itself or traditional RISC "advantages".

No, AMD chips aren’t very risc-like. Yes we have micro ops, but we also have a limited number of registers, complicated pipelines that have to deal with branch misses that can happen in a single CISC op but between microops, instructions that access memory outside load stores and can cause all sorts of dependencies and stalls, etc. There’s a lot more to RISC vs. CISC than instruction complexity.

 

[leman]

This actually happened with the Pentium Pro in 1995 and was later adopted for Core, plus AMD uses the technique. This means both Intel and AMD CPUs are internally RISC-like. The more dense CISC instructions actually reduce bus bandwidth and make more efficient use of instruction and data caches.

RISC and CISC as hardware design paradigms have been obsolete for a while. One can’t just meaningfully apply these monikers to modern superscalar hardware.
Frankly, we should stop using these labels altogether. They are misleading, laden with connotations and simply not helpful. Both x86 CPUs and ARM CPUs use micro-ops, register renaming etc. - none of them run the ISA “directly”.

Instruction density is another complicated topic. Yes, x86 can be slightly denser (depending on optimization level and nature of the code), but it has little to do with it’s “CISC” origin. ARM has fixed instruction length while x86 has variable one - some older, more frequently used instructions are shorter. So it gives the compiler more opportunities to optimize for core size. But then again ARM has immediate Oper and compression, more registers, can store multiple registers in the same instruction, does not rely on stack as much as x86... all opportunities to reduce the number of instructions.

I think we should be comparing the ISA design (e.g. the fact that ARM is load/store while x86 base is not) on one hand and hardware design on the other. Notions such as RISC and CISC should be dropped.

However in recent years Apple's Ax CPU development has been on an improved power/performance curve which currently seems to be holding. Already the A12Z CPU in an iPad Pro is roughly as fast as the 4.2Ghz quad-core Intel Kaby Lake CPU in a 2017 iMac 27. Nobody has yet authoritatively explained how this was achieved, when all previous RISC designs failed to compete. It is unlikely not simply due to the ARM instruction set itself or traditional RISC "advantages".

Anandtech did a very good in-depth analysis. Performance advantage of Apple CPIs comes from the fact that they are very wide machines. They have 50% more execution units than Kaby Lake and thus can execute more instructions at the same time. They also have very like instruction reorder buffer to keep these units busy. And of course, they have ridiculous amounts of cache and insane memory level parallelism, not to mention that they probably use advanced power gating to keep the power usage down.

 

[joema2]

....Anandtech did a very good in-depth analysis. Performance advantage of Apple CPIs comes from the fact that they are very wide machines. They have 50% more execution units than Kaby Lake and thus can execute more instructions at the same time...

Could you please point me to that article which states Apple Ax performance advantage over Intel is due to being a wide machine? I spent about 1 hr looking for it and could not find it.

Internally Sunny Cove does five-wide instruction issues and has a 10-wide back end and 10 execution units. I haven't seen any authoritative article stating the performance advantage of the Apple Silicon CPU over x86 is due to it being a wider superscalar design (hence better IPC) than the latest x86 microarchitecture: https://en.wikichip.org/wiki/intel/microarchitectures/sunny_cove

Based on current hardware it does appear that Apple Silicon CPUs have a definite power/performance advantage and are rapidly encroaching on x86 overall performance. The question is how, since previous RISC designs (SPARC, MIPS, Alpha, etc) did not generally succeed. This forced Apple themselves to leave POWERPC RISC for x86.

The latest POWER9 CPU is an advanced RISC design which is a very wide, sophisticated out-of-order machine. Yet in general benchmarks don't show a dramatic performance or power/performance advantage over the latest AMD and Intel designs.

If at long last the Apple Silicon RISC CPU is finally superior to x86, it would be interesting to know technically how it succeeded when so many prior RISC designs did not.

Maybe it has nothing to do with RISC; if so why mention RISC characteristics such as larger register file, fixed-length instructions, etc. as being key contributors to the Apple Silicon CPU advantage?

 

[JMacHack]

If at long last the Apple Silicon RISC CPU is finally superior to x86, it would be interesting to know technically how it succeeded when so many prior RISC designs did not.

Maybe it has nothing to do with RISC; if so why mention RISC characteristics such as larger register file, fixed-length instructions, etc. as being key contributors to the Apple Silicon CPU advantage?

DISCLAIMER: I'm not an engineer, nor an expert in processors. I'm a dummy who spends too much time reading about this stuff.

The way I understand it is that it has less to do with the RISC nature of Apple's Architecture, and more to do with the ASICs they pack onto the SoC. Take for instance the image they provided at WWDC:

It seems to emphasize the "add-ons" of the processor far more than say, integer or FP performance. I think that's where Apple's trying to leverage their control over the processor. Or at least that's the vibe I get from the marketing and commentary.

 

[cmaier]

Could you please point me to that article which states Apple Ax performance advantage over Intel is due to being a wide machine? I spent about 1 hr looking for it and could not find it.

Internally Sunny Cove does five-wide instruction issues and has a 10-wide back end and 10 execution units. I haven't seen any authoritative article stating the performance advantage of the Apple Silicon CPU over x86 is due to it being a wider superscalar design (hence better IPC) than the latest x86 microarchitecture: https://en.wikichip.org/wiki/intel/microarchitectures/sunny_cove

Based on current hardware it does appear that Apple Silicon CPUs have a definite power/performance advantage and are rapidly encroaching on x86 overall performance. The question is how, since previous RISC designs (SPARC, MIPS, Alpha, etc) did not generally succeed. This forced Apple themselves to leave POWERPC RISC for x86.

The latest POWER9 CPU is an advanced RISC design which is a very wide, sophisticated out-of-order machine. Yet in general benchmarks don't show a dramatic performance or power/performance advantage over the latest AMD and Intel designs.

If at long last the Apple Silicon RISC CPU is finally superior to x86, it would be interesting to know technically how it succeeded when so many prior RISC designs did not.

Maybe it has nothing to do with RISC; if so why mention RISC characteristics such as larger register file, fixed-length instructions, etc. as being key contributors to the Apple Silicon CPU advantage?

Your premise is broken. RISC has frequently outperformed x86 in the past. Those RISC machines never took over the world simply because they didn’t run consumer/x86 versions of Windows. The DEC Alpha blew away contemporaneous Intel products. So did the Exponential PowerPC. And so did various RS/6000 workstations, Silicon Graphics machines running on MIPS, and even some UltraSparc machines.

Apple Silicon is mainly different from these in that this time around the superior RISC CPU brings along with it a massive software base.

 

[Boil]

Exactly,

Your premise is broken. RISC has frequently outperformed x86 in the past. Those RISC machines never took over the world simply because they didn’t run consumer/x86 versions of Windows. The DEC Alpha blew away contemporaneous Intel products. So did the Exponential PowerPC. And so did various RS/6000 workstations, Silicon Graphics machines running on MIPS, and even some UltraSparc machines.

Apple Silicon is mainly different from these in that this time around the superior RISC CPU brings along with it a massive software base.

Where's my 970X...?!?

Largest selling consumer Silicon Graphics machine? Nintendo 64...! ;^p

And in the Fantastic Four movie now on Disney+, a young Reed Richards has a few racks of Nintendo 64s in his garage lab, what would that theoretical cluster look like...!?!

Jokes aside, SGI had the O2, which was a nice little "entry-level" multimedia workstation running a Unified Memory Architecture...

Hmm...

Mac Pro Cube - starting at US$5,999.00

48 P cores / 4 E cores / 96 GPU cores - CPU / GPU Chiplets & RAM on interposer / package design
HBM3 Unified Memory Architecture - 128GB / 256GB / 512GB
NVMe RAID 0 (dual NAND blades) 4TB / 8TB / 16TB
Four USB4 (TB3) ports
Four TB4 ports
Two 10Gb Ethernet ports
One HDMI 2.1 port
Three MPX-C slots (for use with asst. MPX-C expansion modules)


Apple MPX-C Expansion Modules - starting at US$599.00

NVMe RAID Storage Module (Quad NAND blades)
GPGPU Module
FPGA Module
Neural Engine Module

;^p

 

[cmaier]

Exactly,


Where's my 970X...?!?

Largest selling consumer Silicon Graphics machine? Nintendo 64...! ;^p

And in the Fantastic Four movie now on Disney+, a young Reed Richards has a few racks of Nintendo 64s in his garage lab, what would that theoretical cluster look like...!?!

Jokes aside, SGI had the O2, which was a nice little "entry-level" multimedia workstation running a Unified Memory Architecture...

Hmm...

Mac Pro Cube - starting at US$5,999.00

48 P cores / 4 E cores / 96 GPU cores - CPU / GPU Chiplets & RAM on interposer / package design
HBM3 Unified Memory Architecture - 128GB / 256GB / 512GB
NVMe RAID 0 (dual NAND blades) 4TB / 8TB / 16TB
Four USB4 (TB3) ports
Four TB4 ports
Two 10Gb Ethernet ports
One HDMI 2.1 port
Three MPX-C slots (for use with asst. MPX-C expansion modules)


Apple MPX-C Expansion Modules - starting at US$599.00

NVMe RAID Storage Module (Quad NAND blades)
GPGPU Module
FPGA Module
Neural Engine Module

;^p

I owned the floating point unit on the x704 PowerPC. My first job out of grad school. Best job i ever had.