Will there be a new Mac Pro in 2015?

[askunk]

An Italian blog, Bits and Chips, published the rumor about Intel skipping Broadwell EP to jump directly to Skylake.
The rumor spread across the net, being posted even by relevant feeders.

What do you guys think about it? I believe that the main cause for a lack of a nMP refresh is the CPU, and it seems almost everybody agree (given the bus restrictions, which would limit or inhibit the adoption of TB3, DP 1.3, additional SSD..).

This guy, among the few analysts who commented on the rumor (and on Intel's delays), spotted an interesting job posting by Intel, that could suggest Skylake Xeons might not be that far away.

http://www.fool.com/investing/gener...oration-should-skip-broadwell-in-servers.aspx

@

 

[Stacc]

From what I have read, there are rumors both for and against broadwell EP being cancelled. However, my bet would still be on broadwell EP coming out towards the end of this year or early next year. There haven't been any roadmap leaks or anything of that nature that would lead me to put a lot of stock in intel canceling it.

I think Apple is waiting on Thunderbolt 3, which can be implemented using Haswell or Broadwell. While there may be bandwidth constraints in implementing thunderbolt 3, its unclear whether these would be addressed by Skylake EP.

 

[Bradleyone]

I believe that the main cause for a lack of a nMP refresh is the CPU

Is this true though?

I'd been thinking that it was the graphics processors which made the current nMP outdated...

In benchmarks, the D700 is barely equal to the performance of last year's retina iMac's M295X - a mobile chip in an oversized laptop shell. The nMP is only redeemed by the fact there are two graphics chips and it has better heat dissipation for long term running.

The D700 and the rarely mentioned D500 and D300 are all embarrassingly underpowered relative to both last year's and this year's flagship graphics chips from either nVidia and AMD.

CPU-wise, the current nMP has adequate performance (though again lapped by the iMac's Core i7 turbo mode of 4.4GHz vs the Xeon's 3.9GHz in single-threaded tasks, it's only multi-core where it shines).

While a generation bump would of course be nice, there doesn't seem there was much performance gained from Ivy Bridge v2 to Haswell v3, just power efficiency. Would waiting for Broadwell v4 have boosted performance that much, or was it intended as another minor evolutionary step? I thought Skylake v5 was the big one.

There were even better Ivy Bridge chips Apple could have offered back when it came out, for instance the 8-core 3.3GHz variant, showing that Apple may not have been as keen on CPU performance as graphics. (To be fair, this more expensive chip only adds around 1000 to the nMP 8-core's approximately 25,000 Geekbench score.)

Please correct me if I'm wrong, but I'd assumed the main wait for a 6,2 model nMP was adapting AMD's new chips to the boards in the nMP. I'm imagining engineers currently taping out circuit board designs for a production run to commence September/October.

I think Apple is waiting on Thunderbolt 3, which can be implemented using Haswell or Broadwell. While there may be bandwidth constraints in implementing thunderbolt 3, its unclear whether these would be addressed by Skylake EP.

Is there a big call for Thunderbolt 3 in the target market(s) just yet?

Thunderbolt 2 peripherals seem barely established. The argument that Thunderbolt 3 is needed for an Apple Retina 5K Display seems weak, when using 2x Thunderbolt 2 connectors is perfectly viable (eg, Dell's 5K) and also extends the market to existing nMP owners.

Is Thunderbolt 3 important enough to hold up a spec bump to the nMP, which as I've argued above, should be more about the graphics processors than anything else?

 

[Zarniwoop]

Is Thunderbolt 3 important enough to hold up a spec bump to the nMP, which as I've argued above, should be more about the graphics processors than anything else?

I agree. We already have USB type-c that can be used for DP 1.3. And what prevents Apple to put real DP 1.3 connector to the nMP v2? So instead of using valuable PCI lines to transfer, it could be connected directly to the GPUs. Real DP connector has also a locking switch to prevent the cable detaching by itself that I'd valued a pro feature. Too easy TB losses a signal when I move my rMBP a little bit.

Of course, if Apple is introducing new external displays, they need more that just a DP-port. So, USB type-c would be a working solution for now. Maybe next-gen displays are not called Thunderbolt displays anymore.. perhaps Pro Displays?

 

[ManuelGomes]

Is it just me or this Intel job posting seems bogus?!
Intel never details too much what they're working on, usually won't mention at what stage in development they're in, and specifically mentioning Skylake and 10nm... uhmm, something's fishy.
OK, it's a job description but still... something doesn't add up.
And Qualcomm doesn't seem to be in a good competing position right now, don't think Intel will fear them much at the time at least.
AMD is also still far from being a real threat.

Apple should know what will be the deal with Broadwell-EP, and their decision will or was based on it for sure. If it was indeed cancelled then they either stick with Haswell for a soon to come refresh, or wait for another year or so for Skylake. Unless, Skylake is indeed coming sooner, which I very much doubt but hope it does.
On the other hand, if Broadwell remains active, and seems unlikely that Intel would drop the ball at this time - although we don't really know if there really was a Broadwell-EP planned or in development to be cancelled - then maybe this is exactly what Apple is waiting for and we could see the refresh later in the year.
Still, I believe it all depends on the availability of TB3. I'd say the PC ecosystem will not care much for TB3, as it was the case of TB2. Some will have it just to make a point, but plain USB-C will lead. Still, only with Kaby Lake will there be chipset (Intel integrated that is) support for USB 3.1 to go with it.
Apple will surely make TB3 a great addition, even tough there really is no great demand for it at the moment, same as it was with TB2. Still, they will surely make good use of it for the newer TBDs. Not needed indeed, but it's going to be marketed as a one cable solution instead of the 2 cable used at the moment, which is a good argument in Apple's book.
There are no DP1.3 cards right now, and there won't be that soon it seems. Possibly next generation for all manufacturers next year.
Thing is probably next gen output connectors will be USB type C, not DP. Don't forget that Apple needs to be ahead of everyone in terms of both new tech and also design. Smaller reversible connectors is the way to go here.
Right now we could have a nMP with 2 TB3 ports, another 2 TB2 ports and 6 USB 3.0 ports. But this is going backwards as was already mentioned.
No really good solution is available right now, maybe that's why Apple is holding the upgrade.

 

[koyoot]

Whats holding Apple is the effect of new item. Mac Pro is designed to have very long life cycle, with very high price tag. If they will postpone the next revision of their computer far enough from last one in time, the more people will potentially buy it, including people who owned first gen trash can Mac Pro .

 

[ManuelGomes]

Indeed, but they won't update just for the sake of it.
I think people will go for it anyway, once it's out.
But the available hardware is not yet what they want, for the new version to be something you cannot say no to an upgrade.

 

[koyoot]

Lets think what is on the market. AMD Fiji, Grenada GPUs. DDR4. Haswell EP. 2GB/s SSDs with up to 2 TB of storage space. USB-C. There is no TB3, but there is also no CPU that would really benefit from it. TB3 requires PCIe x4 lane. Haswell has 40 PCIe lanes, of which 32 are consumed by GPUs. And there is also SSD, USB lanes, Thunderbolt 2, etc, etc...

Skylake EP however will have 48 lanes of PCIe. And that makes more sense. As of right now, the best idea for Apple IMO is to update MP on october with everything that falls in line: new GPUs, USB-C, SSD, Haswell-EP, DDR4. And then, after another one and a half year wait for Skylake EP, adding also the TB3. Only this IMO makes sense.

 

[ManuelGomes]

koyoot, I really think Apple wants TB3 in there, regardless of anything else. It's sort of a statement, being the first out.
Regarding lanes, that's the issue really. But like I said, it could come with 2 TB3 ports (x4 PCIe 3) and the SSD in the remaining 4 lanes out of the CPU.
Another 2 TB2 ports, for "older" hardware could come out of the PCH, although somewhat capped by the CPU-PCH speed. USB 3.0 is already present on the PCH.
And Skylake will not have 48 PCIe lanes, not the WS SKUs. Only high end server parts of the Purley platform. Apple will always use the 1S 1600 SKUs, very much doubt they'll use even the Skylake 2600 parts. Yet another different socket, 6 channels mem, whatever. This would mean having 2 different nMPs, one for the low end procs and another for the high end 2600 series, different sockets, different boards, you name it.
This is why I believe the way to go is not that clear anymore.
But still a long way from that time, or not.
That's why a Broadwell refresh should come.

 

[Bradleyone]

As of right now, the best idea for Apple IMO is to update MP on october with everything that falls in line: new GPUs, USB-C, SSD, Haswell-EP, DDR4.

Perfect logic. I like that reasoning very much.

Could they perhaps introduce the nMP 6,2 as early as the September 2015 iPhone 6s event? Or is it more of a press release type of thing? (The latter might also help with keeping demand in check, as there is probably enough pent up demand that will overwhelm the supply capabilities of the relatively small US factory.)

Of course, the announcement of the new Apple Retina 5K Display - compatible with existing (2013) Mac Pros, high spec 15" MacBook Pros, and the new Mac Pro - might justify a Phil Schiller segment in the September or October events.

I can even suggest a new tagline for him to use:

"Can't update our specs, my ass!"

 

[ManuelGomes]

great tagline there
but Apple will not mix the iPhone and Mac Pro events.
They might do a separate event just to announce the revised nMP.
News of the 5K Retina display would surely fire expectations.
Only way to tell regarding new stuff will be in El Cap beta versions to come, those guys who dig into it will possibly find hidden treasures.

 

[koyoot]

I would not count on it. From what I witnessed the Fury GPU indications are only in El Capitan, not Yosemite. Also, AMD cracked OpenCL drivers for only El Capitan OS, not Yosemite. So at the event when El Cap final will be released or after that time, IMO.

 

[Zarniwoop]

Of course, the announcement of the new Apple Retina 5K Display - compatible with existing (2013) Mac Pros, high spec 15" MacBook Pros, and the new Mac Pro - might justify a Phil Schiller segment in the September or October events.

Apple could finally declare that they have completed Retinizing their desktop product line (along with iMac 21" retina that we could see before El Captain release). And by phasing out Macbook air.. or giving it a retina treatment they'd retinized their whole Mac line. Now that would be a stage to celebrate, and the theme of El Capitan release session.

 

[ManuelGomes]

Yes, Retina all over the product range seems to be the goal, and it's almost there.
If they do indeed want to continue in the external display race, the 4K/5K is a must.
Unless they do believe it's time to leave it to others, which I'm not inclined to believe.
They need retina for the Mac Pro, others have good displays but they are not Retina.
Apple needs to control this too.

 

[ManuelGomes]

Yosemite is old news, nothing new will come before El Cap for sure.

 

[deconstruct60]

There is something going on, because whole staff of AMD buys AMD stock in big amounts, and Intel Staff is selling Intel stock in high amounts.

AMD's stock is a 'penny' stock. A change of a dollar or two is like a 50-100% return on investment. Sure they might gamble on that. Intel has made substantive gains in the last couple of years. Enough to warrant sells to rebalance a portfolio into more diversity.

Also Intel just cut R&D by 1/3. From 10.5 Billion USD to 7.7 Billion. And its R&D mostly on fabs. Maybe some "naysayers" in the internet are right, that behind the shiny surface Intel is not doing that well as people think... .

Where was this 1/3 cut? Chart for Intel's R&D spending for last year (or 5 , YTD , etc) is available here

https://ycharts.com/companies/INTC/r_and_d_expense

shows no dip. Intel's 2Q15 report?

http://newsroom.intel.com/community...ntel-reports-second-quarter-financial-results

No mention of 1/3 radical chop in R&D. Recent conference call transcript ....

http://www.thestreet.com/story/1322...eport-q2-2015-conference-call-transcript.html

again no radical chop mentioned. Intel is slowing down CapEx ( Capital Expenditures ) because they are not doing a hyper aggressive switch to 10nm (and 7nm). But technically that isn't R&D. There may be some slow down in alternative paths in 7nm approaches that is slowed down but broad, deep cuts in R&D data is lacking. Where is the source?

Buying Altera for $16B only makes sense if can more those FGPA products to bleeding edge processes faster than other folks. Also don't think the Altera R&D budgets/costs have been folded in. Not likely to go down, but it may change the relative percentage to overall revenues. As a percentage of revenues Intel's R&D probably is going to change over next couple of years.

 

[deconstruct60]

...
This guy, among the few analysts who commented on the rumor (and on Intel's delays), spotted an interesting job posting by Intel, that could suggest Skylake Xeons might not be that far away.

http://www.fool.com/investing/gener...oration-should-skip-broadwell-in-servers.aspx

@

That "analysis" makes even less sense now than it did back in January. Intel just announced that they are going to spend 3 iterations on 14nm for the mainstream micro-architecture. They are not trying at all to deliver Cannonlake in 2017. So skipping Broadwell-EP and jumping to Skylake-EP faster just gets to you a faster arrival at a stall in 2017, not the next generation product.

Qualcomm ( and other ARM vendors ) are deep threat in the server space? Again .... a joke. The Data Center group earned more money than ever last quarter. There are even more "server" variant Atom class processors released now than before (e.g., http://www.cpu-world.com/news_2015/2015051901_Preliminary_Xeon_D_and_Pentium_D_lineup.html ) . Intel won't keep all ARM vendors completely out of the server space, but none of those vendors has shown anything that is a creditable threat. Qualcomm's slight miss with the Snapdragon 810 (heat problems ) means they should be dropping far more R&D efforts into their "home" market rather than trying to pick a fight with Intel. Oh and Intel bought Altera so they have a multibillion FGPA+ARM business fully in flight now. Intel has ARM covered too.

The other article noting the drop in QLogic orders doesn't hold much water either. QLogic largely has high speed network chips. Intel sells those. If making your own "home grown", scale out server (i.e., you are Microsoft, Facebook , Google, etc) it makes some sense to buy in bulk from Intel ( CPU , network , cjhipset ) than spreading it out. There are other substitutes for what QLogic sells. A drop in their sales doesn't necessarily mean servers in general are dropping.

Alot of this "Skipping Broadwell-EP" smells like just blindly copying the desktop release pattern over to the server chips. The market dynamics are different due to being different markets. If the mainstream processors are shifting over to a 2.5 year period between shrinks ...... that is actually a closer match to what the Xeon E5/E7 class have already been doing the last couple of generations. Going on a faster tick/tock cycles is actually the opposite direction of where things are going.

Unless there is something inherently buggy about Xeon E5 v4 ( Broadwell) yields there isn't much motivation to drop it. Intel may not be able to scale up to the maximum core count, but the non release isn't particularly going to enable v5 to be pulled forward in time any quicker.

 

[ManuelGomes]

Maybe at IDF Intel will shine some light on Broadwell-EP, if it's coming or not, and if yes when.
If not it seems a lot of effort thrown out the window.
I wouldn't count on Skylake being ready to takes it's place just yet.

 

[deconstruct60]

....
And Skylake will not have 48 PCIe lanes, not the WS SKUs. Only high end server parts of the Purley platform. Apple will always use the 1S 1600 SKUs, very much doubt they'll use even the Skylake 2600 parts.

The 1600 v5 parts are not particularly likely to match the 2600 v3 or v4 parts in max core count. So by not having an option of 2600 parts the max core count likely would at best go stagnant.

I don't think the WS SKU are going to get OmniPath (built-in high end networking) or the new UPI ( the QPI replacement for Processor interconnect), but haven't seen anything concrete that they are stagnating on CPU package PCI-e bandwidth. That would be surprising. v1-v4 have had 40 PCI-e v3.0 lanes. To saddle v5-6 with the same, that would be 6-7 years of standing in place. If not integrating 10+GbE into the chipset then dual GPU cards plus 10-100 Gbe networking card (or some other very high end I/O bandwidth ) runs into a wall. However, the different socket from the 2s could be solely due dropping the UPI/OmniPath pins.

Historically, Intel has just trimmed off the QPI links as far as limiting I/O for the 1600 series. UPI and OmniPath probably do have pin demands that the 1600 series doesn't really need; so I can see a different socket. But the baseline PCI-e allocation... that I don't see as much as being necessary.

Sure there will be more PCI-e v3 lanes on the PCH chipset but those are likely to get consumed by PCIe SSD and/or Thunderbolt v3 demands in many workstation configs.

Yet another different socket, 6 channels mem, whatever. This would mean having 2 different nMPs, one for the low end procs and another for the high end 2600 series, different sockets, different boards, you name it.

The 6 channels/DIMMs likely isn't a good fit for the Mac Pro physically and is more highly driven by the new upper cap of 24-28 cores. At some point, if keep cranking the core count higher you have to go more parallel on the memory also.
I suspect the Xeon 1600 won't try to match the core count on the 2600 series so probably would stick with 4 channels, but doesn't mean can't expand the PCI-e count.

That's why a Broadwell refresh should come.

It should come because I doubt Intel can pull v5 forward much. The v5/Skylake/Purely charts had the 1S WS version as in the design stages and targeted for 2017 (or later). I don't see how pull that forward by at least a year and get through the more rigorous testing cycles the server/workstation class goes through.

What Apple probably should do with Broadwell though is to start to stay out of the Xeon E5 2600 v4 options that have the substantially higher core counts. If intel is going to "split" Xeon E5 1600 and 2600 into two differnt sockets then Mac Pro will split with the "single socket" option on that split over the long term. That means closer managed expectations on what the max x86 core count options are going to be.

 

[deconstruct60]

From what I have read, there are rumors both for and against broadwell EP being cancelled. However, my bet would still be on broadwell EP coming out towards the end of this year or early next year. There haven't been any roadmap leaks or anything of that nature that would lead me to put a lot of stock in intel canceling it.

For HPC specific hardware roadmaps I can see Intel tossing Xeon E5 v4 aside as being an option. E5 v5 probably is a bigger difference maker and may be able to roll out "early" to a very limited subset of vendors. ( Intel did this for Xeon E5 v1 (Sandy Bridge)). The incremental core count increase of the Xeon E5 v4 isn't buying much. Especially relative to Xeon Phi and/or the other GPGPU options with even high count increases.

But yeah... broad market it doesn't make much sense to skip.

I think Apple is waiting on Thunderbolt 3, which can be implemented using Haswell or Broadwell. While there may be bandwidth constraints in implementing thunderbolt 3, its unclear whether these would be addressed by Skylake EP.

Xeon E5 v5 ( Skylake-EP) does two things. First, it should increase the number of PCI-e v3 lanes. Right now with a max of x40 and two x16 GPUs there isn't enough to go around. Especially if you want TB v3 and an internal x4 PCI-e v3 SSD. Second, they should get a better aligned chipset. With current design Apple doesn't need any SATA lanes. Apple doesn't need a C622 follow on chipset to the C612. They need something like a C621 which drops SATA (and USB 2 ) and more maxes out the PCIe lanes count at lower power. More v3 lanes on the chipset is going to help ease routing and placement since have relatively high number of PCIe v3 consumers internal. Also should cut down on the need for a 3rd party PCI-e switch ( basically inside the chipset at a lower cost. )

Two x16 and three x4 is a budget of at least x44 lanes to match the current 3 TB controllers and 2 GPUs. They need another two x4 v3 lanes to get to two, "top speed" internal SSDs.

Xeon E5 v5 isn't necessary to deploy a TB v3 Mac Pro, but it would/should be a more robust system implementation with one.

 

[Stacc]

I agree. We already have USB type-c that can be used for DP 1.3. And what prevents Apple to put real DP 1.3 connector to the nMP v2? So instead of using valuable PCI lines to transfer, it could be connected directly to the GPUs. Real DP connector has also a locking switch to prevent the cable detaching by itself that I'd valued a pro feature. Too easy TB losses a signal when I move my rMBP a little bit.

Of course, if Apple is introducing new external displays, they need more that just a DP-port. So, USB type-c would be a working solution for now. Maybe next-gen displays are not called Thunderbolt displays anymore.. perhaps Pro Displays?

The issue is that no graphics card until probably mid 2016 is able to output displayport 1.3. Of course, we aren't talking about what is possible in terms of a retina display, we are talking about what Apple will likely choose to do. While it is possible that Apple could have a retina display with two cables, this is would be very unlike Apple to do. If they wanted to do this, they could have done it when they introduced the retina iMac. Apple likes to wait until they can do things the "right" way. An example of this is waiting until a 5k panel became available for the retina iMac, instead of using a lower pixel density 4k display.

I do think that Thunderbolt 3 will be an important technology for the Mac Pro. Essentially, the Mac Pro has moved all internal expandability external, making it a box that is fantastic for shifting data around. It has lots of bandwidth available between the SSD, dual GPUs, and 3 thunderbolt controllers. The method for shifting around most of this data is Thunderbolt. With thunderbolt 3, they increase the max speed of each thunderbolt/pcie pipe. Apple will wait on this, as each mac pro version will likely have a lifespan of about 2 years. If thunderbolt 3 comes out at the end of this year, Apple wouldn't announce a revised Mac Pro without it at this point.

Of course available bandwidth to and from the processor is a limitation here, which may dictate Apple waiting at least a year for skylake-ep. Alternatively, Apple could find a way to share the available bandwidth. One solution would be to update the existing thunderbolt 2 controllers to thunderbolt 3. This wouldn't change the available bandwidth to the pool of all thunderbolt controllers, but it would increase how much of that pool any one controller could use.

When it comes to the retina display, it may be possible for some kind of adapter to exist that would convert 2 thunderbolt 2 channels to thunderbolt 3. The only evidence for this is the fact that the high end macbook pro and mac pro specifications have been changed to reflect support of a 5k display. However, its not exactly uncommon for apple to drop support for older/existing machines when it comes to the external display. I don't think thunderbolt had spread across the entire mac line when the current display was announced.

 

[ManuelGomes]

Exactly what I was saying.
By the Intel roadmap, lower tier 1S WS will have a different approach - socket incusive - than high end servers.
Different core count, different chipset, network needs - all different.
nMP is a small form factor WS and tipically a 1S machine, although with some 2600 CPUs for the higher core count. Still, you surely don't expect to see a nMP with Omni Path, 6ch mem and all that stuff, right?
So, what happens with the nMP by that time? Dead? Or nMP will be a low end WS and finally a full blown WS/Server is created with Purley? That would be the way to go, but I don't see it.

Do you think Intel will provide Apple with earlier v5 Xeons? Is Apple such a big Xeon customer for Intel? Nah.
Maybe the 48 lanes of PCIe 3 will como to 1600 v5 but by then you'll need even more. The PCH can even be discarded and the CPU will be monstrous.
Of course Apple doesn't need the whole Intel PCH, most of it is unused anyway. But will Intel make a special cut down version for only a "few" units for Apple's nMP? Very much doubt it.
The problem with PCIe 3 in the PCH is that of the bottleneck even with DMI3 in Lewisburg. Helps, but makes no miracles.

 

[deconstruct60]

... Apple will wait on this, as each mac pro version will likely have a lifespan of about 2 years. If thunderbolt 3 comes out at the end of this year, Apple wouldn't announce a revised Mac Pro without it at this point.

A every 2 years cadence is suggestive it is not a singular component that is blocking an update. It is that Apple only has a limited R&D resource allocation to a periodic product updates. With that kind of update frequency they'll wait for several components and update on the conjunction of multiple new parts.

Apple is still the main momentum behind Thunderbolt. It Apple skipped putting TB v3 on a high profile system then the 'doom and gloom' folks will be out in force. Apple almost has to do rapid roll outs of new TB iterations to keep it moving. The Mac Pro is likely to get TB v3 "sooner" rather than "later" mainly because the other Mac systems ( MBP, MB, etc. ) are likely to get TB v3 over the next 4-10 months (depending on how fast Intel's Gen 6 (mainstream SKylake) roll out goes. The MP trailing on TB implementation for 1.5.-2 years would be bad for Apple's desired TB v3 adoption rate.

When it comes to the retina display, it may be possible for some kind of adapter to exist that would convert 2 thunderbolt 2 channels to thunderbolt 3.

Highly doubtful. Two ports on the same TB controller doesn't "buy" you double the bandwidth. It is the same bandwidth. It isn't two channels it is two controllers. I don't think that is going to work as a "Thunderbolt" solution. You can have two legacy DPv1.2 streams driven by the same single GPU source synchronize at a monitor. But two somewhat independent sources synchronized..... that is likely going to have problems.

The only evidence for this is the fact that the high end macbook pro and mac pro specifications have been changed to reflect support of a 5k display.

Those are DisplayPort solutions from a single GPU source... not TB ones.

I don't think Apple has a huge hole short term that only they can fill with 5K external display docking stations. If Apple sells "enough" 5K iMacs then I think they'll be happy with that.

 

[deconstruct60]

nMP is a small form factor WS and tipically a 1S machine, although with some 2600 CPUs for the higher core count. Still, you surely don't expect to see a nMP with Omni Path, 6ch mem and all that stuff, right?
So, what happens with the nMP by that time? Dead? Or nMP will be a low end WS and finally a full blown WS/Server is created with Purley? That would be the way to go, but I don't see it.

"low end WS" is a bit overblown. It doesn't "die" or go "Dead". On just x86 core count, Xeon E5 1600 doesn't mean you are stuck in time.

Xeon E5 1600 v2 nominally toped out a 6 cores. ( yes there was a E5 1680 v2 at 8 but really was priced just like the tweaked 10 core 2600 that it really was ). Base entry count was 4

http://ark.intel.com/products/series/75771/Intel-Xeon-Processor-E5-1600-v2-Product-Family

Xeon E5 1600 v3 nominally toped out at 8 cores and the base count still 4.
http://ark.intel.com/products/series/81064/Intel-Xeon-Processor-E5-1600-v3-Product-Family

Xeon E5 1600 v4 may or may not get 10. If stay at 8 then mostly will get clock bumps. I wouldn't be surprised if the base entry count is still 4 (only with non-kneecapped clock rates so more reasonable)

Xeon E5 1600 v5 at least probably can get to 10. The entry base count probably moves to 6.


It is still on a increasing core count path... just not shooting for the maximum number. If have a mix of legacy serial code and high counts to run then clock is about as important as core count. Intel can deliver that better in a independent single socket line up.

However, very high core counts........ have to get off of the only x86 cores count path to a short-sighted future. A more robust OpenCL implementation and really not stuck with just x86 cores anymore. If have a workstation that is oriented toward graphics work then the GPGPUs are probably going to play an increasing computational role over time. If memory access is evened out what solely specific to a x86 do you actually need no large graphically oriented data arrays? Audio data isn't necessarily excluded either if need to do some embarrassingly parallel work on it..

Do you think Intel will provide Apple with earlier v5 Xeons?

No.

Maybe the 48 lanes of PCIe 3 will como to 1600 v5 but by then you'll need even more. The PCH can even be discarded and the CPU will be monstrous.

You get more than the 48 because the PCH/chipset will have more. Tbe PCH is absolutely not going to get discarded any time soon in desktop systems. The ethernet , WiFI, Bluetooth, audio aren't going anywhere and that is where they attach. It would be more sensible if the PCI-e SSDs nominally attached there along with any SATA high capacity storage ( Mac Pro may have dumped SATA but doubtful the majority of the 1S WS market is going that route ).


P.S. I think there may be some Purely "WS" but they probably will be the smaller subset of folks. Some will have Xeon Phi to crank up their x86 fixated binaries and others will to ever expansive RAM caches for larger data sets.

Of course Apple doesn't need the whole Intel PCH, most of it is unused anyway. But will Intel make a special cut down version for only a "few" units for Apple's nMP? Very much doubt it.

Server blades need 12 on board SATA lanes why? They need 12 USB sockets why? It is farce that just Apple under uses chipset capabilities. There are 1S servers too that don't need UPI and OmniPath or lots of legacy I/O.

The current C612 chipset is more skewed for 2S set ups than 1S ones. If drop the 2S system then the set is going to get more streamlined. [ built in RAID makes SATA HDDs go faster, but top end SSDs don't really need it if the capacity levels are covering mere TBs not 10's of TB or higher. ]

The problem with PCIe 3 in the PCH is that of the bottleneck even with DMI3 in Lewisburg. Helps, but makes no miracles.

Don't really need a miracle is just add a few more on the CPU package. It is up in the air whether Apple will provision having two internal SSDs. The sorely missing piece on the C612 is just 4x for a current top of the line x4 PCI-e v3 SSD. Minimally that is all Apple needs. [ Could use x8 v3 -> x4 v3 , x4 v3 switch and a x4 controller in a x4 allocation to do 3 TB v3 with two GPUs if bumped up the CPU allocation slightly. ]

 

[ManuelGomes]

A lot of people are mostly fixated on core count alone, and number of processors, and that is understandable for a few that in fact make good use of them. Those have their reason to want more. But I believe some only say they need them but in fact it's just to put down the nMP, which at the moment cannot be dual CPU. Maybe in the future there will be a Cube - the next NeXT Cube? ;-) That would be cool, going back to the origins...
The PCH will not go away soon in the DT, but has you say, the WS and server space have less use for it as time goes by, as everything that is bw consuming gets processor direct connection. SATA and all the DT derivatives tend to get unused in the DT as well, everybody has seen PCIe SSDs blow past them so they want it too. USB2 is just taking up space and resources, unless you're one of those that has loads of USB stuff connected all the time.
This leaves LAN (although Apples seems to want to ditch it in favor of WiFi altogether), that with the speed bumps will probably also get to the processor, WiFi + BT and audio (but here TrueAudio could also make it redundant).
It's not going anywhere but with a couple of PCIe lanes you can completely eliminate it, at least in these minimalist configurations (Apple and other ws). Only a small controller with the communications functionality would suffice.
SSDs attached to the PCH would counter the benefits of direct coupling with the CPU. Even if you get 20 PCIe 3 lanes on the PCH, stuff them all up with large amount of data spitting devices and you'll be waiting forever.
C622 could have another PCIe SSD and a few more TB3 ports - OK. Would they perform like the ones linked to the CPU directly?