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Geez... Look at the size of the L3 and L2 cache... No wonder they beat the old procs clock for clock... wow!

What does GT stand for again?

And on covering those MOSFETs just place a strip of aluminum over them. Maybe used some aluminum weld (paste) to make it permanent on the heat sync?

gigatransfers
 
Anyone think that a desktop i7 processor and non ECC ram will work?

Anyone brave enough (with the single core version) to have a go?

Edit: Because X58 should work in this config, and later next year I wouldn't mind putting a 3.2Ghz Desktop i7 with 6Gb 1333MHz non ECC DDR3!
 
yes it can be upgraded. if anyone here decides to upgrade cpu's, be really careful. the original cpu's are NOT clamped down and when you remove the heatsink, the CPUs hang on to the heatsink for a second, then drop down onto the board and in my case bent a pin or two. so be really careful.

at least we know that all the dual socket versions 2.26 and up are all the same machine.

also, if you go 2.66 or higher, you should switch to 1333MHz memory to take advantage of the speed.

here's a pic with 1 of my 2.93's installed. 2nd socket is empty. notice the QPI 6.4 GT/s (QPI stands for QuickPath Interconnect). the 2.26 GPI is 5.8 GT/s.

That is awesome. Job well done.
 
Anyone think that a desktop i7 processor and non ECC ram will work?

Anyone brave enough (with the single core version) to have a go?

Edit: Because X58 should work in this config, and later next year I wouldn't mind putting a 3.2Ghz Desktop i7 with 6Gb 1333MHz non ECC DDR3!

I am using patriot non ECC ram in my 2.66 quad core. Works fine. When I mixed the apple ram and the patriots, ECC was just disabled.
 

Well it's 4 times bigger than the X5355 for L2 and 2 times bigger than it's L3.


The bigger the cache, the slower (in a given technology). Gotta trade off size, vs. cache bandwidth, vs. cache latency, vs. cache architecture (shared/independent, interleaved, etc.), vs. number of levels. It's really quite fun.

Yeah, yeah... :p I know you're probably right on some obscure technical level but from the DEC's Alpha to todays Xeons everytime I get to compare 2 otherwise identical chips the one with the larger L1 / L2 cache is always remarkably faster than the one with the smaller cache. So here's that place people are always talking about where the real and technical worlds divide and seem not to occupy the same space and time. ;)
 
OK Everyone, good news. GREAT NEWS. The upgrade from 2.26 to 2.93 works like a charm. my last failure was due to my own carelessness and pin bending. i am going to upgrade the memory to 1333 mhz next and run some benchmarks. just need to get that strip of MOSFETs covered somehow.

anybody got some good benchmarks to try out?

According to documentation 1333MHz memory will only work if you only use the first slots on the memory channels (i.e. more than 3 dimms per processor means no 1333MHz speed, probably why Apple didn't bother with it). If 1333MHz works it would be nice if you could just confirm this for the sake of completion if possible. Thanks.
 
Well it's 4 times bigger than the X5355 for L2 and 2 times bigger than it's L3.




Yeah, yeah... :p I know you're probably right on some obscure technical level but from the DEC's Alpha to todays Xeons everytime I get to compare 2 otherwise identical chips the one with the larger L1 / L2 cache is always remarkably faster than the one with the smaller cache. So here's that place people are always talking about where the real and technical worlds divide and seem not to occupy the same space and time. ;)

Obscure technical level? :) I probably designed a few of those chips you're thinking of :) (Seriously though - caches have been increasing in size, and performance has been increasing through time. But at any given point in time, there will likely be one or two chips with small caches that outperform chips with bigger caches).
 
Obscure technical level? :) I probably designed a few of those chips you're thinking of :) (Seriously though - caches have been increasing in size, and performance has been increasing through time. But at any given point in time, there will likely be one or two chips with small caches that outperform chips with bigger caches).

Likely be? I don't go by likelihoods mister. (hehe :) j/k) I'm speaking from at least 15 years of compiled benchmarks. That's how long I've been purchasing, running, and benchmarking medium to large sized rendering farms. Longer actually but for 68K I didn't consider the technical and applied aspects of CPU caches.

By Obscure technical level I mean egg-head marks. Dry stones, wet stones, moist sponges, and rubber biscuits. These all will reveal the truth of what you say - well all but the rubber biscuits, which I just made up. But in the real world of video and sound editing or even many/most rendering engines the inverse is true. The 5% to 10% speed increase you get from a 2x sized L2 cache 80% of the time offsets the 0.01% speed decrease that is implied therefrom.
 
Likely be? I don't go by likelihoods mister. (hehe :) j/k) I'm speaking from at least 15 years of compiled benchmarks. That's how long I've been purchasing, running, and benchmarking medium to large sized rendering farms. Longer actually but for 68K I didn't consider the technical and applied aspects of CPU caches.

By Obscure technical level I mean egg-head marks. Dry stones, wet stones, moist sponges, and rubber biscuits. These all will reveal the truth of what you say - well all but the rubber biscuits, which I just made up. But in the real world of video and sound editing or even many/most rendering engines the inverse is true. The 5% to 10% speed increase you get from a 2x sized L2 cache 80% of the time offsets the 0.01% speed decrease that is implied therefrom.

For years opteron blew away xeoin on every benchmark despite much smaller caches. Give me a break, buddy. If you had detected a real correlation chip manufacturers would add cache, not cores. Cache is easy to design compared to on chip memory controllers, pipelines and cores.


And I'll put my 14 years of CPU design up against your 15 years of benchmarking any time.
 
For years opteron blew away xeoin on every benchmark despite much smaller caches. Give me a break, buddy. If you had detected a real correlation chip manufacturers would add cache, not cores. Cache is easy to design compared to on chip memory controllers, pipelines and cores.


And I'll put my 14 years of CPU design up against your 15 years of benchmarking any time.

I'm glad we can be a little rough with each other and still have fun. :cool:

That's apples and oranges without a doubt tho. You're talking about two COMPLETELY different architectures. And that last comment about cache over cores is kinda silly don't you think? Cache helps in one limited way. Multiple cores are a totally different story. And I'm sure there's a threshold where adding more cache does very little to nothing at all. All that said, my 15 years of benchmarking added to what manufacturers officially say is the case wins over your 14 years at an engineering desk. :) Nya-nya.
 
I'm glad we can be a little rough with each other and still have fun. :cool:

That's apples and oranges without a doubt tho. You're talking about two COMPLETELY different architectures. And that last comment about cache over cores is kinda silly don't you think? Cache helps in one limited way. Multiple cores are a totally different story. And I'm sure there's a threshold where adding more cache does very little to nothing at all. All that said, my 15 years of benchmarking added to what manufacturers officially say is the case wins over your 14 years at an engineering desk. :) Nya-nya.

Dude Nehalem is a new architecture too. And you were comparing it to older intel architectures.
 
I am using patriot non ECC ram in my 2.66 quad core. Works fine. When I mixed the apple ram and the patriots, ECC was just disabled.

Ah excellent news!

Now two questions remain (I added one more ;))

1. Do the desktop i7s work?
2. If you fit tight timing DDR3 1333/1600 does it clock to that speed...
 
According to documentation 1333MHz memory will only work if you only use the first slots on the memory channels (i.e. more than 3 dimms per processor means no 1333MHz speed, probably why Apple didn't bother with it). If 1333MHz works it would be nice if you could just confirm this for the sake of completion if possible. Thanks.

where ever you read at, it makes sense. i put in 4 sticks of 1333, and it only runs 1066. odd.

i'm going to try 1 stick of 1333 and see if it shows 1333. but i got the dual 2.93GHz running. It's fast as hell. Cinebench R10 at 26,000.
 
Dude Nehalem is a new architecture too. And you were comparing it to older intel architectures.

No. please read more carefully. I said everytime I get the chance to test two otherwise identical processors - bla bla bla....

And even if you thought otherwise that's an OK flag for you to blunder so? :p

Hehehe you're busted. :)
 
Cinebench Benchmark 2.26 vs 2.93 vs. last 2.8

The Cinebench R10 benchmark between the dual 2.26GHz and dual 2.93GHz:

New Nehalem Dual 2.93GHz - Cinebench R10 at 26,000.
New Nehalem Dual 2.26GHz - Cinebench R10 at 19,000.
Previous Gen Dual 2.80GHz - Cinebench R10 at 18,500.

Yes I have no life.
 
where ever you read at, it makes sense. i put in 4 sticks of 1333, and it only runs 1066. odd.

i'm going to try 1 stick of 1333 and see if it shows 1333. but i got the dual 2.93GHz running. It's fast as hell. Cinebench R10 at 26,000.
As I wrote in another thread: using all four RAM slots does lower down the three sticks at all due to changing from the faster tripple channel mode to a double channel mode, which means 25% lower clock frequenzy of the bus.
Not saying, that apps always go slower with using 4/8 sticks instead of 3/6 - it depends.

Have a look at this again - especially memory riddle. When you use 3/6 sticks the system runs in triple channel mode (25,5GB/s) which is faster than dual channel mode (17GB/s) [sorry, have a german link only]. Now using 4/8 sticks, the whole system will lower down in the dual channel mode.

But thats not the only point of interest. There ist another fact having influence on the total speed of the system. Mentioned by barefeats:

"As for memory usage, though you can only specify up to 3GB memory cache in the Performance Preference panel, Mac OS X is clever enough to grab unused memory as a virtual scratch volume instead before handing off the task to the actual scratch disk. If you are editing RAW photos with lots of layers and lots of history states, having the 8 memory slots in the 8-core Nehalem at dual-channel speeds can be better than 6 sticks running at triple-channel speeds. That's because slower memory transfers are better than really slow hard disk hits."

So some apps may benefit from using 4/8 sticks instead of 3/6 although the bus speed itself lowers down.

And at least "it's better to drop from triple channel to double channel performance than to run out of memory and start doing virtual memory disk swaps."
 
The Cinebench R10 benchmark between the dual 2.26GHz and dual 2.93GHz:

New Nehalem Dual 2.93GHz - Cinebench R10 at 26,000.
New Nehalem Dual 2.26GHz - Cinebench R10 at 19,000.
Previous Gen Dual 2.80GHz - Cinebench R10 at 18,500.

Yes I have no life.

That's incorrect.

https://forums.macrumors.com/posts/7270035/

And remember the green bar is the one that is important to most of the people most of the time. Like 85% of the people 90% of the time.
 
As I wrote in another thread: using all four RAM slots does lower down the three sticks at all due to changing from the faster tripple channel mode to a double channel mode, which means 25% lower clock frequenzy of the bus.
Not saying, that apps always go slower with using 4/8 sticks instead of 3/6 - it depends.

Have a look at this again - especially memory riddle. When you use 3/6 sticks the system runs in triple channel mode (25,5GB/s) which is faster than dual channel mode (17GB/s) [sorry, have a german link only]. Now using 4/8 sticks, the whole system will lower down in the dual channel mode.

But thats not the only point of interest. There ist another fact having influence on the total speed of the system. Mentioned by barefeats:

"As for memory usage, though you can only specify up to 3GB memory cache in the Performance Preference panel, Mac OS X is clever enough to grab unused memory as a virtual scratch volume instead before handing off the task to the actual scratch disk. If you are editing RAW photos with lots of layers and lots of history states, having the 8 memory slots in the 8-core Nehalem at dual-channel speeds can be better than 6 sticks running at triple-channel speeds. That's because slower memory transfers are better than really slow hard disk hits."

So some apps may benefit from using 4/8 sticks instead of 3/6 although the bus speed itself lowers down.

And at least "it's better to drop from triple channel to double channel performance than to run out of memory and start doing virtual memory disk swaps."

Has it actually been confirmed that with four dimms it runs in dual channel mode rather than the first three running in triple channel and the fourth in single channel causing the overall speed to be reduced? I ask because Intel configure their board with four memory slots per processor to two channels per processor with two slots per channel. Why wouldn't they do like Apple have done if you can switch between the two?

Also the 1333MHz stuff I was asking about is because with one DIMM per channel you can run at that speed, with two you can run at a maximum of 1066MHz and with three you can run at a maximum of 800MHz. So with all the memory slots full you can't get a speed of 1333MHz, which is probably why Apple don't offer it as an option.
 
And there's a reason if you've ever needed one that Apple should have stuck with the black box for the Mac Pro! :eek:

Actually, how about an anonymous brown box? I really don't need every UPS employee up to and including my snarky driver knowing about my $3000 purchase ;)
 
Has it actually been confirmed that with four dimms it runs in dual channel mode rather than the first three running in triple channel and the fourth in single channel causing the overall speed to be reduced?
I´ve seen an article here in Germany that confirmed just what I wrote: 3 sticks are working in triple channel mode. Adding a fourth stick the system (all sticks) is running in dual channel mode.
 
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