I'm hoping the FCPX for iPad release this morning puts an end to the "Spring Mac Event" thing finally.
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MP All Models 40 core ASI with PCI-E slot is around the corner!!
- Thread starter Amethyst
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No, AE it will include Occulink as "pro-thunderbolt" eGpu/eCompute solution, and come without PCIe slot, basically a trashcan maybe not cylindrical, it may look as a compact cheesegrater without internal expansion.
Lol a machine like that would not sell well. How is it much different from the Mac Studio. I would hope Apple would be knowledgeable enough to know bringing back the trashcan is a mistake
It would be hilarious if said "Mac Pro trashcan 2.0" turns out to be the VR headset base station instead.
Assuming this is real. It is NOT a production board. You only need one PCIe slot to experiment with PCIe functionality. This is the purpose on making a one-off test board, to enable experiments.
PCBs are now so cheap to make. I can have just one board made n China for only a few dollars per square inch. So it makes sense to have a "run" of 2 or 5 boards made. Then later you make changes and Mae a couple more.
ost parts you will see in early development are NOT pre-production prototypes but rather "experiments" or just a part to allow software testing.
If you wait long enough WWDC will be the "delayed Spring Mac event."If he repeats it persistently enough, one day he will be right.
Leave this here, tomorrow I'll come back 🤫
So is tomorrow (Tuesday - May 16, 2023) THE DAY...?
Special pre-recorded video presentation release of the ASi Mac Pro...?
If it is M2 Ultra-based, then no hardware ray-tracing...
If it is M2 Ultra-based, then we wait for the M4 in 2025 for the ASi Mac Pro to receive hardware ray-tracing...?
M4 Ultra & M4 Extreme - Gen2 hardware ray-tracing, N3X process for higher clock speeds, based on A18 (A19?) cores...?
Still hoping for a WWDC 2023 ASi Mac Pro release, with M3 Ultra & M3 Extreme chips, would not even be mad if it were a preview and actual shipping units were sometime before the end of 2023...?
Apple uses raw NAND modules for performance - which M.2 doesn't support. It doesn't seem likely at this point they'd go back to M.2.
I mean M.2 ssds (like in Windows PC) *in addition to* the memory on Apple's M2 chips.
If apple's history is an indication there won't be multiple storage devices (slots for drives (plural) ). Apple's current T2 'slots' are really internal SSD busses ; a tweaked PCI-e for internal storage purposes. It isn't even standard PCI-e protocol.
The MP 2013 has one drive. The imac Pro one internal drive. The BTO options for the MP 2019 .... one internal drive. The rest of the Mac line up; one. and only one, internal drive. That trend is pretty clear in that it wouldn't be storage slots (plural). Extremely likely there will be just one nominal internal drive.
Is Apple going to band storage drives in standard PCI-e slots in the next Mac Pro ? Probably not. If they put in a standard slot folks can optionally add M.2 , U.2 , E1 or E3 EDSFF , etc. sockets as they wish.
Going to dump the internal SATA and USB sockets for non BTO drives? If they keep the same exact basically case chassis, then that would be extremely dubious. An straightforward discrete SATA controller sitting on a x1 PCI-e v4 lane wouldn't be that hard to do. Decent chance there can do the same for a USB controller ( already do that for the iMac 24" 'extra' USB-C sockets. ) . I don't think Apple is a big fan of SATA, but cheaper ( $/GB) bulk, relatively low bandwidth storage is still better on spinning plates.
PCI-e v6 any time soon is pipe dream. Even Intel has that pegged two more generations out.
Intel Xeon "Diamond Rapids" to support PCIe Gen6 and CXL Gen3 - VideoCardz.com
Intel Diamond Rapids with PCIe Gen6 Hardware leaker YuuKi_Ans reveals first details on future Xeon architecture. YuuKi has been sharing confidential information on HPC series from Intel and AMD for a very long time. With access to non-public information and hardware, he has already revealed...
"Granite Rapids" might surface in 2024 if things stay on track. Diamond would be another > 12 months after that.
(2025-26 ). PCI-e v6 without CXL v 2.0+ is pragmatically a waste of time ( at least on x4-x16 wide lane allocations). Apple has given about zero indications that they are willing to follow down the CXL evolutionary path. [ AMD isn't rushing past PCI-e v5 quickly either. ]
PCI-e v5 is also not particularly likely at all either. Apple has implemented some x1 PCI-e v4 links. Going to x16 PCI-e v4 would be an far more likely evolutionary path for them.
That is highly doubtful. Thunderbolt as implemented inside the SoC package, each TB controller has its own PCI-e controller coupled to the TB controller. Those PCI-e controllers sit on the internal data bus on the die. They don't consume much 'more' than anything else on the internal bus. It is far, far more effective Perf/Watt to do it that way. If there is an iGPU there (and there probably is ) then there is little good reason to decouple the nominal TB controllers.
Given Apple has gone through the effort to create their own TB controllers, it is pretty doubtful they want to run off and buy discrete Intel ones.
You are smoking a whole lot of powerful something if think Apple is going to use N3X in anything....
" ... TSMC claims that N3X will support voltages of (at least) 1.2v, which is a fairly extreme voltage for a 3nm-class fabrication process. The leakage cost, in turn, is significant, with TSMC projecting a whopping 250% increase in power leakage over the more balanced N3P node. This underscores why N3X is really only usable for HPC-class processors ..."
Power leakage off the charts higher than the other option. Yeah right, Apple , mr. Pref/Watt is going down that road. *cough* Not. Even in the HPC class processors, for many use cases this is somewhat dubious. Probably not many 'big' chips ( or chunky chiplets) going to go down that road. There are likely some corner case HPC chiplets that are brning lots of power on I/O anyway that will put up with this, but for lots of cores/cache that's llkely kind of a goofy trade-off.
You are smoking a whole lot of powerful something if think Apple is going to use N3X in anything....
" ... TSMC claims that N3X will support voltages of (at least) 1.2v, which is a fairly extreme voltage for a 3nm-class fabrication process. The leakage cost, in turn, is significant, with TSMC projecting a whopping 250% increase in power leakage over the more balanced N3P node. This underscores why N3X is really only usable for HPC-class processors ..."
Power leakage off the charts higher than the other option. Yeah right, Apple , mr. Pref/Watt is going down that road. *cough* Not. Even in the HPC class processors, for many use cases this is somewhat dubious. Probably not many 'big' chips ( or chunky chiplets) going to go down that road. There are likely some corner case HPC chiplets that are brning lots of power on I/O anyway that will put up with this, but for lots of cores/cache that's llkely kind of a goofy trade-off.
I was thinking Apple might use N3X just for the Mac Pro...?
What I know about the Mac Pro is that nobody knows about the Mac Pro. 8 PCIe slots, who saw that coming? All we can do is speculate. I’m still betting on Mac Studio on steroids, with 0 PCIe slots. An extra m2 slot or 2 maybe plus ports. Magic 8-ball says tomorrow is not the day.
Pretty likely the Mac Pro is going to have to share one of its SoC packages with another Mac. (or minimally major chipet subcomponents something deployed else). Second, deploying the subunits of the die to yet another fab process would just add to the costs. Probably, need adjusted power/clock management also.
This is a triple digit leakage increase for 5% (SINGLE DIGIT) worth of permance increase. That is a pretty desperate trade off.
A wide variety of HPC workloads are parallel ( and some 'embarrassingly parallel'.). Adding some more cores can also get a 5% increase without going into desperation mode. And with 200% lower leakage there is thermal room to do that. Wider and lower clocks permeates Apple's designs so far. Apple in a desperate move to be king of hill on single threaded drag racing? Probably not. Even on a Mac Pro ( Mac Pro is about higher (the the rest of Mac line up) core counts not low ones.) .
Mostly you're right, apple development on the Mac Pro traditionally the one with less leaks, ASi Mac Pro won't fail this, only "safe" leaks are: e/d GPU compute accelerator comeback, 4x M2 max (or equivalent M3? I doubt the Mac pro to be M3 launch product unless in 3d multi chiplet form similar to latest AMD Epyc).
Big chances for it to be a glorified trashcan/Mac studio on steroids.
Lot of vendors are reading eGPU enclosures based on Occulink cable, maybe they are tipped or partner in crime.
I just hope the ASi Mac Pro even exists at this point, and there is something to buy in a couple months. That it is not a year away still from Apple even talking about it, or acknowledging it is still a product line.
Last three very high end Mac introductions have been "sneak peak and see you in 6 months" introductions ( MP 2013 , iMac 2017 , and MP 2019 ). Even the XServe discontinuation had longer than a couple of months lead time built in.
I suppose if they are going to use the same case with new internals , they might peg this as a non-radical change that needs time for the user base to adjust to the changes. (major price increase , add/remove PCI-e cards , etc.). Externally it make be close the same , but the likelihood for some internal 'revolution' is pretty high. ( soldered RAM, no ECC , major max RAM capacity ***** , etc.)
They could get around that by just not dropping the Intel model on introduction. Folks who want status quo can still buy it. Folks jumping to new world order can get started. However, that gets more sketchy the longer Apple drags their feet here. Sales as 'new' of the MP 2019 going very far into 2024 seem dubious. The x86-64 new competition for that in 2024 is going to be seriously hard to compete with. Not easy now, but it is going to get progressively worse.
Apple is pretty much likely to get forced into talking about it after WWDC at some point. Blowing the "about 2 year" deadline is going to be hard even after the diversion of the xrOS production line hoopla at the WWDC dog and pony show. That distraction isn't going to last long. The post WWDC write ups in the tech press are all going to hammer on "yeah that's all great but they blew the transition timeline". And if Apple has cobbled up some M2 kludge for the Mac Pro ... getting it at least announced before the M3's come is going to force their hand.
By the end of 2023 they will have to say something. If only another small limited reporter session of "we are really , really trying hard .. it is coming, but the dog ate my homework" event. At end of 2023, they are effectively at the same point they were at with the MP2013 in 2017 ... a four year old processor in what is suppose to be a leading edge system.
The 4 x M2 Max is one of the 'safe bet' leaks? That is seems doubtful. The M2 Max was reported to have similar core interrupt mask support that the M1 Max had. Which means looking at some kind of "Ultra" variation .
Trying to push the Mn Max past two dies is likely a Rube Goldberg exercise that doesn't work well on mulitple dimensions ( economically and/or transparent/low impact NUMA issues). The Max is not a good chiplet. 4 x some other dies might work , but the laptop optimized Max die has very serious issues.
That 'leak' about Apple patents covering e/d GPUs was complete rubbish. That wasn't a 'safe bet' leak either.
WWDC 2023 should reveal if Apple has put in the work. They should do a compute GPU to remain competitive.
AMD Epyc doesn't really use 3D chiplets. (at least in how TSMC uses the term for 3D packaging ). [ it yammering about 3D cache ...not really the same thing. ]
This in a thread where leaker noted that a prototype had multiple slots. I know lots of folks are extremely eager to slap 'trashcan' label on it if it doesn't have RAM DIMM and display dGPUs , but that really isn't 'trahcan' and also seriously not "Studio on steroids" either. Multiple internal drives is a substantive gap over both of those all by itself.
Yeah right. Step 1 would be Apple even coming up with a x4 PCI-e v4 provisioning to make Occulink even usable. Can't both say "slots are doomed" and then start spinning some " Occulink is going to save the world " story. To start provisioning x4 , x8 , or x16 Occulink Apple would need to same provisioning to enable a slot. And if already have a chassis that can do 6-8 slots no problem ... the upside is what?
Occulink port on some other Mac system. Ha! extremely likely not going to happen. Occulink only a Mac Pro is goofy. Mac Pro doesn't need that kind of silo kneecapping. It needs to be attached to viable ecosystem.
Thunderbolt 4 is better than TBv3 ... lots of the windows PC eGPU folks are stuck in TBv3 land and Occulink looks 'better' with some 'extra' x4 PCI-e v4 sockets (e.g., repurpose an M.2 socket not going to use) popping up in newer systems.