AMD Discussion

[koyoot]

Actually I do not know really much about CPU architectures and what affects what, however...
https://browser.primatelabs.com/v4/cpu/88332

Isn't all this because memory performance need's to be double checked in very wide CPU core counts, and it takes time, and affects the overall performance of the CPU even on the Single Thread front?

So lets take a simple math based on this score for wide Intel CPU: 3000 points from Geekbench/3600 MHz of core clock x 1440 MHz of Zen core = 1200 Geekbench points.
Naples scored 1141 pts in the same test.
1141/1200 = 0.95
1200/1141 = 1.05

On paper, Zen architecture is very similar in single thread design(Floating Point, Integer, registers, cache uops).

http://www.anandtech.com/show/10591...t-2-extracting-instructionlevel-parallelism/7

Lets compare Zen to Broadwell on this front.
Integer Registers: Zen 168, Broadwell 168
Floating Point Registers: Zen 160, Broadwell 168
Retire Queue: Zen 192, Broadwell 192
Dispatch/cycle: Zen 6 uops/cycle, Broadwell 4 uops/cycle
Retire rate: Zen 8/cycle, Broadwell 4/cycle
Load Queue: Zen 72, Broadwell 72
Store Queue: Zen 44, Broadwell 42

Only thing that can let-down Zen at this point is the quality of silicon(not likely, as there will be two designs: 14 nm HP GloFo for server and most likely HEDT CPU parts, but that last bit remains to be confirmed, and 16 nm FF+, for... Zen APUs), and the clocks to how high levels it can clock the HEDT CPUs, and the bandwidth of cache itself. And of course, Zen is not able to work with AVX512. And that the CPU will emulate AVX256, from double the 128 bit feature set.

Those are just my thoughts on this. Lets focus on the architecture itself for this discussion.

Sources say that Zen might have 19 stage pipeline, for conditional branches and 22 for mispredict branches. Which means the core clocks can be at least at the level of Bulldozer, which have had 15-16 stage pipeline.

So the only thing that is unknown are the core clocks. Interesting in this context is that Bulldozer chips have had 125W TDP, and 8 cores.

Before I thought that what we will actually see will be 8 core, 125W, and 3.5 GHz base core clock with 4 GHz Turbo CPU.
Right now Im not sure this will be the case...

Before you will say that 19-22 stage pipeline is too long. Look at FP and Integer Registers, Retire and Dispatch queue. All of this mitigates the latency created by that long pipeline, alongside the Core Clocks. At least this is how I interpret how CPU's work. Im not very fond of how they work(never been interested really, because there was always one brand for me: Intel).

 

[Zarniwoop]

Apple released Best Metal practices today, and there's an interesting tidbit; iOS and tvOS do support Unified memory architecture, so they're already HSA compatible. macOS however is not and uses discreet memory model even with iGPU's where discreet memory model is emulated in the driver.

So, AMD CPU's wont bring the benefit of unified memory and low latency and other HSA treats with macOS Sierra and we have to wait at least one year more for next revision of Metal. Mac's with AMD APU are therefore unlikely before that... unless Apple wants to make more profit with custom APU... sure they do, but maybe next year with macOS 10.13.

Source: https://developer.apple.com/library....html#//apple_ref/doc/uid/TP40016642-CH17-SW1

 

[deconstruct60]

Am I missing something? That puts Naples at half the speed of an Iphone 6 in single core, and only four times faster in multi-core!

Chapter 11 for AMD if that's really true.

Missing something? Errrrr,

1. The reference website is wcctech.com ( high quality intelligence analysis info ... *cough* yeah right. )

2. Reading the info in the cited benchmark it is clearly labeled.

a. An Engineering sample. ( further reinforced by being model 0 and stepping 0 so basically the very first set of batches out of the fab ever done. )

b. Running around 1.44GHz (around 1/2 the speed of a of the A10 and no where near retail/release production speeds. )


Besides those extremely likely informative points .......... there are probably a few others you are missing. There is nothing here to say anything one way or the other about Chapter 11.

 

[cube]

Continuing...

Ideally, a DDR4 controller would be added to Excavator FDX to bridge people from AM3, AM3+ and the current APU sockets into AM4. Bristol Ridge already has it.

Of course, you need to get the motherboard manufacturers to provide BIOS updates.

 

[cube]

The BS that some sites publish, paraphrasing:

"Previous iMacs had AMD Zen, the new ones will have Intel, which is better"

It seems any moron has a "news" site now.

 

[cube]

I don't see any official information regarding the AM4 socket.

Is is a higher density layout so that backward compatibility is simply not possible?

It would seem this socket only helps FX people if it allows more than 8 cores without wasting a lot of gfx pins.

 

[ManuelGomes]

https://www.techpowerup.com/225858/globalfoundries-announces-its-7-nm-finfet-technology

 

[cube]

So GloFo's immersion 7nm will be ready about 18 months before their 12FDX.

 

[koyoot]

http://semiengineering.com/the-zen-of-processor-design/

Interview with Mark Papermaster on Zen.

 

[Zarniwoop]

http://semiengineering.com/the-zen-of-processor-design/

Interview with Mark Papermaster on Zen.

That was a positive read. And confirms my belief that Apple will one day start using AMD APU's or custom chips. Because:
- Security
- More Profit with custom SoC.
- To make a distinction from general x86 PC's - marketing value ("our macCPU10-architecture is unprecedented...")
- Software and hardware departments can make a common roadmap to the future and collaborate more than ever... similarly as they do with iOS / iTOYs

This October we will see mostly new Intel Mac's... (New Air and MBP 15 and maybe some updates for Mini and regular iMac) but next year could be changing the direction, along with next version of macOS / Metal.

Custom Zen sounds a perfect solution for iMac Pro. Are we going to see it already in February? Will Mac Pro become an extension box for iMac Pro? The eGPU box? Mac accelerator for iMac Pro.

 

[cube]

I think the reason making AMD break socket backward compatibility would be the number of pins in DDR4.

 

[cube]

Sideline:

Does the ProBook 455 G4 support dual channel RAM or not?

 

[koyoot]

http://wccftech.com/amd-am4-socket-zen-bristol-bridge-soc-package-pictured/

 

[deconstruct60]

http://wccftech.com/amd-am4-socket-zen-bristol-bridge-soc-package-pictured/

A rather lame, tenuous link to Zen..... Bristol Ridge

"... Systems powered by 7th Generation AMD A-Series processors are productive, immersive, and energy efficient, with up to four “Excavator” CPU cores. ..."
http://www.amd.com/en-us/press-releases/Pages/new-mainstream-esports-2016sep05.aspx

Not only is this not hooked to the Mac Pro in any significant way, it isn't even hooked to Zen in a significant way. ( oooo , oooo same socket is lame when not even on topic in the first place. ).

does wccftech pay you for page views?

 

[cube]

It is related to Zen. This is the new universal socket for desktops.

 

[koyoot]

A rather lame, tenuous link to Zen..... Bristol Ridge

"... Systems powered by 7th Generation AMD A-Series processors are productive, immersive, and energy efficient, with up to four “Excavator” CPU cores. ..."
http://www.amd.com/en-us/press-releases/Pages/new-mainstream-esports-2016sep05.aspx

Not only is this not hooked to the Mac Pro in any significant way, it isn't even hooked to Zen in a significant way. ( oooo , oooo same socket is lame when not even on topic in the first place. ).

does wccftech pay you for page views?

Actually Zen will use AM4 socket, and if you will look there, there is also backside of Zen CPU with pins exposed for the viewer .

So it is related

 

[ManuelGomes]

AM4 seems quite on topic to me.
It's well known that Bristol Ridge comes first for a while now.
However, Zen fir for nMP will probably use a different socket.

 

[cube]

Yes, they cannot downgrade the nMP to 8 cores.

Maybe not a 32-core server socket, but 16.
[doublepost=1474203881][/doublepost]I wonder if AM4 will be able to support 12 cores, if not 16.

AM3 had 6-cores, AM3+ 8.

Both AM3+ and C32 have up to 8-cores.

C32 has 8-cores, G34 16.

There should be good perspectives for everybody, not just APU customers.

 

[Zarniwoop]

Zen Mobile Q2/17
http://wccftech.com/zen-based-notebooks-2h-2017/

 

[Mago]

Yes, they cannot downgrade the nMP to 8 cores.

Maybe not a 32-core server socket, but 16.
[doublepost=1474203881][/doublepost]I wonder if AM4 will be able to support 12 cores, if not 16.

AM3 had 6-cores, AM3+ 8.

Both AM3+ and C32 have up to 8-cores.

C32 has 8-cores, G34 16.

There should be good perspectives for everybody, not just APU customers.

A dua socket Zen APU for a Mac pro it's feasible too, having 16 core and two Vega-class GPU in a total tdp close to 500W.

 

[AidenShaw]

A dua socket Zen APU for a Mac pro it's feasible too, having 16 core and two Vega-class GPU in a total tdp close to 500W.

Not in the current form factor, but could be done is a somewhat larger tube with more power and cooling.

 

[cube]

A dua socket Zen APU for a Mac pro it's feasible too, having 16 core and two Vega-class GPU in a total tdp close to 500W.

The current C32 used mostly for single socket is 8-core.

If Zen server CPU can have 32 cores, there could be server single socket supporting up to 16.

 

[Mago]

Not in the current form factor, but could be done is a somewhat larger tube with more power and cooling.

The current tube is ok, the apu would took the GPU location with few revisions to the core, the few know about those HPC apu is it would tsp below 250W, with few nip tuck the core could handle 600W, also there is no challenge to run the APU interconnect fabric thru the former main board, my only concern is the dimm location as there is not much space behind the GPUs it should require so-dimm

 

[Mago]

AM3+ and C32 are single socket.

If Zen server CPU can have 32 cores, there could be a server single socket supporting up to 16.

Google for "AMD Zen apu hpc cern "

 

[cube]

Google for "AMD Zen apu hpc cern "

So?