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Naples is 32 core CPU, 4096 GCN core GPU, 16 GB HBM2 APU monster with 180-225W TDP. It will not end up in MBP :).

35W quad core APU with 16 CU's and 2-4 GB of HBM2 - that is what we will see if Apple will decide to ditch Intel from their computers. And its called Raven Ridge :).


HEDT, 8C/16T CPUs are going to have higher amount of PCIe lanes than 16. There is only one design for Summit Ridge, that is shared between the designs. Only 4C/8T has 16 PCIe lanes.

Also Professional CPUs most likely will start with 16 Core layout, and from that it can be cut down to 12 core design. So most likely highest end MCM will look like this: 16C/32T, 64 PCIe lanes(!), 4 channel memory controller. TDP is most likely 125, 150 and 180W(for APU, most likely).
Too many new techs. Hard to follow up. But nice!
 
I'm not going to mix green and red..if you do that you get brown :eek::mad:;)
Haha, well, everything depends on what AMD will provide in terms of GPUs. In my company for example we mixed Blue and Green.

However in quite close future there is a possibility we will have full red setups in only highest end configs(cause Zen most likely will be more efficient than Broadwell and Skylake HEDT CPUs).

Also for power efficiency the most interesting parts are APUs. 4C/8T plus 16 CU Design, and HBM2(the same APU that might go into MBP), but with massively higher clock speed, because of increased TDP. 95W will give in this config 4.0 GHz base CPU clock, and 1.5 GHz on iGPU.

And it will be faster and more power efficient than Kaby Lake 2.9 GHz 35W CPU + 75W Zotac GTX 1050 Ti OC Edition, which is fastest GTX 1050 Ti without 6 pin connector.
 
Naples is 32 core CPU, 4096 GCN core GPU, 16 GB HBM2 APU monster with 180-225W TDP. It will not end up in MBP :).

35W quad core APU with 16 CU's and 2-4 GB of HBM2 - that is what we will see if Apple will decide to ditch Intel from their computers. And its called Raven Ridge :).


HEDT, 8C/16T CPUs are going to have higher amount of PCIe lanes than 16. There is only one design for Summit Ridge, that is shared between the designs. Only 4C/8T has 16 PCIe lanes.

Also Professional CPUs most likely will start with 16 Core layout, and from that it can be cut down to 12 core design. So most likely highest end MCM will look like this: 16C/32T, 64 PCIe lanes(!), 4 channel memory controller. TDP is most likely 125, 150 and 180W(for APU, most likely).

False, Naples is just 32core future Opteron variant based on Zen. That 32core APU solution is just rumored solution for HPC segment. You got codenames messed up.
 
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IPC is Broadwell/Haswell level.

If everything what we got so far is correct, and in line base 8C/16T CPU has 3.45 GHz/3.8 GHz. I will not put rumored price here, however, because at this point it is hardly believable... It is too good to be true...
 
IPC is Broadwell/Haswell level.

If everything what we got so far is correct, and in line base 8C/16T CPU has 3.45 GHz/3.8 GHz. I will not put rumored price here, however, because at this point it is hardly believable... It is too good to be true...

Lower than the $500 USD I've heard?
 
It appears that the CPU has controllers for... everything: USB, Ethernet, NVME, memory controllers...

And it is 95W CPU design, with BDW-E IPC? THAT is extremely impressive. Only things at this point that can let down the platform, is pricing and core clocks.
 
It appears that the CPU has controllers for... everything: USB, Ethernet, NVME, memory controllers...

And it is 95W CPU design, with BDW-E IPC? THAT is extremely impressive. Only things at this point that can let down the platform, is pricing and core clocks.
BTW, I assume that when you said NVME you meant NVMe™ - or is it some proprietary interface?

Which Ethernet - 10 GbE or faster, or something from the last millennium? Which USB standard? Which memory standard?

And comparing IPC is simply meaningless in and of itself - which you implicitly acknowledge by mentioning core clocks.
 
BTW, I assume that when you said NVME you meant NVMe™ - or is it some proprietary interface?

Which Ethernet - 10 GbE or faster, or something from the last millennium? Which USB standard? Which memory standard?

And comparing IPC is simply meaningless in and of itself - which you implicitly acknowledge by mentioning core clocks.
USB 3.1, memory controller for dual channel DDR4 2666 MHz, and HBM2, NVMe, and about Ethernet I have no idea.

Summit Ridge is true SoC chip, but without iGPU.

Also: quite large amount of data for people who are interested in the hardware level design: https://translate.google.com/transl...column/kaigai/1036983.html&edit-text=&act=url

Unfortunately translated, but its surprisingly readable.
 
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And it is 95W CPU design, with BDW-E IPC? THAT is extremely impressive. Only things at this point that can let down the platform, is pricing and core clocks.

Eh, I remain skeptical of Zen until launch day and we see reviews from all sites. The intel power consumption numbers in that leaked review don't agree with Anandtech. AMD has a lot of ground to make up in power efficiency if they want to be competitive with Intel.
 
At this moment, all Ryzen CPUs with 8C/16T are stable at 4.3 GHz all core turbo, and with power consumption under 95W(A2 stepping). There will be two more steppings, for the silicon, before the release(they may be already tested).
 
This is my source, however...

There is clue, without any specifics: http://www.realworldtech.com/forum/?threadid=163466&curpostid=163804
Alexko (lexoka.delete@this.gmail.com) on December 28, 2016 8:12 am wrote:
> I assume that the missing features have to do with clock and power management, not microarchitecture, right?
>

Yeah. Turbo was one, some power management was another, and some minor stuff. It is in the CPU just that the stepping we used was either disabled or buggy. This is normal development stuff, not anything major and most of it seems to be firmware and optimizations, not basic functionality.

I am aware of the open bug counts on A1 and A2 and am very optimistic based on the changes. The next step (A3/4th rev of Zen) should have the last few stamped out long before release. It was stable enough to play Doom on last June so....

Also in another post in the thread:
juanrga (noemail.delete@this.juanrga.com) on December 29, 2016 4:31 am wrote:
> Any comment on OC capability? There are a rumor that points that 8C Zen overclocks to
> 5GHz on air. It is coming from the same source that has published the first benches
> and analysis of Zen. This rumor is spreading as the plague among sites and forums, and
> it is being taken as "confirmed" at Anandtech forums or at Semiaccurate forums.

No hard data but friends have told me it clocks well. If 3.4 is launch speeds, 5 should be no problem for the pros. Haven't heard of any speed path issues yet but you never know until the LN2 guys get ahold of it.

-Charlie

I also forgot, there will be 35W 4C/8T SKU.
 
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So if I buy this "Zen" thing, can I come back on the Mac Pro boards and make fun of mac users stuck in 2013 hardware? That's really why I buy things.

AMD has royally screwed things up in the past. I'm rooting for them, I was even thinking of investing, but I'm waiting for the retail version to decide. It's been a long time since amd was competitive, especially on the high end.
 
4, 6 and 8 core chips could be used by Apple in iMac. MP CPUs would be 12-16 core.
 
So if I buy this "Zen" thing, can I come back on the Mac Pro boards and make fun of mac users stuck in 2013 hardware? That's really why I buy things.

AMD has royally screwed things up in the past. I'm rooting for them, I was even thinking of investing, but I'm waiting for the retail version to decide. It's been a long time since amd was competitive, especially on the high end.
4, 6 and 8 core chips could be used by Apple in iMac. MP CPUs would be 12-16 core.
Bulldozer ][ ...
 
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again with random forum post...
The french magazine that leaked the Zen benchmarks, have confirmed its 5GHz OC on air, possible for Zen A0 revision. Its for single core, but it is 5GHz. A2 stepping is capable of getting to 4.3 GHz on all cores, after OC, but without breaking 95W TDP barrier.

So yes, the random post is more reliable than your posts on this forum, Tuxon ;).

A0 stepping is full of bugs. SMT enabled causes uOp cache to bring errors. The CPU with A0 stepping has Sandy Bridge/Ivy Bridge level of single core performance, clock-for-clock. A2 stepping is already alleviated from those bugs, and it provides Haswell/Broadwell level of performance per clock. The core clocks, are matter of the A3 and A4 steppings.

If anyone will ask me, about predictions I will say that final silicon will start at 3.6 GHz, with 4 GHz boost clock, for 8C/16T SKU, and 95W TDP. Rumored prices, are pretty much jaw dropping, however when you think about where they are positioned, its not that great deal. Its pretty good Smoke and mirrors play from AMD, because Intel cannot compete with AMD on this front which is bizarre statement, I know, but its true.

And funniest part: https://twitter.com/BitsAndChipsEng/status/814837806933692416

Thats why Intel is so behind AMD...
 
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