AMD Discussion

[cube]

Selling "flawed" dies is an essential part of the business model.

Some chips will work flawlessly if defective bits are disabled. Why throw away an "8 core" CPU if it has 6 or 7 good cores? Sell it as a 6-core CPU and make some profit.

It's not a "flawed" 6-core CPU - it just has a billion or two transistors that are never used.

We're are not talking about whole cores, but maybe about some faulty SMT circuitry.

What I would not like is parts just being crippled on purpose.

 

[koyoot]

It is your problem that you think that you control the discussion, and you ignore questions that are outside of your narrow viewpoint.

Just a few posts back you said "4C/4T chips are supposed to be entry level Ryzen chips, if that what you are talking about".

So, the discussion isn't about Naples. The subject is Zen - not Ryzen or Naples. Can't you see that?

https://forums.macrumors.com/threads/amd-zen.1988652/page-24#post-24187339
And whats this post about? You have quoted me. Its your post, in which you are asking about 32 core chip and what memory controller it has.

Is it not about Naples? 4 posts higher. And you contradict yourself.



In other news. The mentioned 4C/4T CPU has lower core clocks than 8C/16T flagship. 3.0/3.4 GHz, with up to 3.2/3.6 GHz SKUs. But that is my opinion only, nothing based on specific information.

 

[AidenShaw]

We're are not talking about whole cores, but maybe about some faulty SMT circuitry.

What I would not like is parts just being crippled on purpose.

But "crippled on purpose" is part of the business model. Particularly after a CPU is in production for a while - yields improve and chips with 8 working cores will be disabled to 6 cores and sold as 6 core chips. Similarly across the lineup.

If you order something online and ask for "3 day" delivery, it might end up in your local depot the next day - and sit for two days so that you get three day delivery.

 

[cube]

But "crippled on purpose" is part of the business model. Particularly after a CPU is in production for a while - yields improve and chips with 8 working cores will be disabled to 6 cores and sold as 6 core chips. Similarly across the lineup.

If you order something online and ask for "3 day" delivery, it might end up in your local depot the next day - and sit for two days so that you get three day delivery.

Yes, I know that sometimes faulty dies are not enough, and good ones are sold as lesser parts.

But if there are too few faulty dies, the right way would be to just drop the model.

Now, with fine grained control, the design bring up some interesting choices: do you for example sell a flawed die as 8C/8T or 6C/12T ?

I miss X3. I did buy one.

 

[AidenShaw]

Yes, I know that sometimes faulty dies are not enough, and good ones are sold as lesser parts.

But if there are too few faulty dies, the right way would be to just drop the model.

Now, with fine grained control, the design bring up some interesting choices: do you for example sell a flawed die as 8C/8T or 6C/12T ?

I miss X3. I did buy one.

If you buy xC/yT - then as long as you get xC/yT you should be happy.

It's irrelevant if the CPU chip is (x+2)C/(y*4)T and has been disabled. You paid for something, and you got it.

 

[cube]

If you buy xC/yT - then as long as you get xC/yT you should be happy.

It's irrelevant if the CPU chip is (x+2)C/(y*4)T and has been disabled. You paid for something, and you got it.

My problem is not about getting what I paid for, but about waste.

 

[Bubba Satori]

My problem is not about getting what I paid for, but about waste.

It's the nature of the CPU fabrication process.
Until that is radically changed, you're always going to have
a certain percentage of less than optimum product and
binning to be as efficient as possible. It's not a wasteful conspiracy.

 

[cube]

It's the nature of the CPU fabrication process.
Until that is radically changed, you're always going to have
a certain percentage of less than optimum product and
binning to be as efficient as possible. It's not a wasteful conspiracy.

As I said, I understand if a small part of product is sold in a wasteful manner to fulfill demand, but not if it's a massive part.

 

[koyoot]

This post sums up everything you need to know about cut down Ryzen parts:
https://forums.anandtech.com/thread...ecture-details.2465645/page-147#post-38666407

1, 2, 4, 6 and 8 cores are entirely possible configs on Zeppelin.
Some of the options are just are not necessarily feasible, since there are some restrictions.

Both CCXs need to have the same amount of cores and L3 usable.

i.e A die with one fully functional CCX + L3 complex and one CCX with two defective cores will be automatically a quad core part, despite there are six functional cores on the silicon. Six cores can only be achieved with 3+3 config.

 

[cube]

This post sums up everything you need to know about cut down Ryzen parts:
https://forums.anandtech.com/thread...ecture-details.2465645/page-147#post-38666407

3 cores would also be possible, no?

 

[koyoot]

No.

It all depends on L3 cache. 3 core chip is automatically dual core, for that reason.

 

[singhs.apps]

All this talk of zen/summit ridge stuff..The pci lane count is interesting.

Unless I am mistaken, the 8 core Ryzen systems will have a total of 32 lanes, 24 from the processor and 8 from the x370 motherboards for a total of 32.

The summit ridge desktop/work station ones will be 8 core ones too but you can put two of those for a total of 64 lanes, enough I suppose for dual/triple GPUs + bandwidth to spare.

IF Apple goes AMD for the Mac Pro ( unlikely but not impossible I suppose ) they might use the Naples variant which means even more PCIe lanes.

Now it seems 8x lanes are good enough for GPU rendering ( my main tech area of professional interest at present ).. x16 doesn't give much benefit if the GPU count in the system is limited by the availability of PCIe lanes. Apparently 4x GPUs @ 8x PCIE is better than 2x GPUs @ 16x PCIe.

I am interested in those dual vega GPUs... putting 4 of them in 8x PCIe slots will give ~ 8x GPU performance ( potential 10-15% performance hit vs real 8x GPUs ? )

Anybody here dabbling in 3D rendering stuff ?

 

[cube]

No.

It all depends on L3 cache. 3 core chip is automatically dual core, for that reason.

I don't understand why 3+3 would be possible, but not just 3.

 

[koyoot]

All this talk of zen/summit ridge stuff..The pci lane count is interesting.

Unless I am mistaken, the 8 core Ryzen systems will have a total of 32 lanes, 24 from the processor and 8 from the x370 motherboards for a total of 32.

The summit ridge desktop/work station ones will be 8 core ones too but you can put two of those for a total of 64 lanes, enough I suppose for dual/triple GPUs + bandwidth to spare.

IF Apple goes AMD for the Mac Pro ( unlikely but not impossible I suppose ) they might use the Naples variant which means even more PCIe lanes.

Now it seems 8x lanes are good enough for GPU rendering ( my main tech area of professional interest at present ).. x16 doesn't give much benefit if the GPU count in the system is limited by the availability of PCIe lanes. Apparently 4x GPUs @ 8x PCIE is better than 2x GPUs @ 16x PCIe.

I am interested in those dual vega GPUs... putting 4 of them in 4 8x PCIe slots will give ~ 8x GPU performance ( potential 10-15% performance hit vs real 8x GPUs ? )

Anybody here dabbling in 3D rendering stuff ?

Better effects you would get with, for example, current, can form factor, and letting the connection of the GPUs over Thunderbolt 3. There is enough of PCIe lanes in this version(32 core, 128 PCIe lanes) to handle 4 GPUs connected externally, for example, in addition to internal two GPUs.

I don't understand why 3+3 would be possible, but not just 3.

Its all about L3 cache and how it connects to the CPU cores. I know its strange but thats, how it appears to be the case.

 

[cube]

Better effects you would get with, for example, current, can form factor, and letting the connection of the GPUs over Thunderbolt 3. There is enough of PCIe lanes in this version(32 core, 128 PCIe lanes) to handle 4 GPUs connected externally, for example, in addition to internal two GPUs.

Its all about L3 cache and how it connects to the CPU cores. I know its strange but thats, how it appears to be the case.

The L3 is in the CCX. If you can have 2 with 6 cores, I don't believe you that you can't have 1 with 3.

 

[singhs.apps]

Can ? No thanks. More cables, more mess... I have had enough of those with the rMBPs

Unless Apple uses one internal GPU and sells a thunderbolt 3 bay supporting 4 dual slot GPUs with it.

If not then those Naples based PC workstations would be mighty tempting systems. Good time to wait and see which way the wind blows.

 

[koyoot]

Can ? No thanks. More cables, more mess... I have had enough of those with the rMBPs

Unless Apple uses one internal GPU and sells a thunderbolt 3 bay supporting 4 dual slot GPUs with it.

If not then those Naples based PC workstations would be mighty tempting systems. Good time to wait and see which way the wind blows.

Im not sure about Apple. But one of ideas discussed internally in AMD is building their own External GPU rack, to which you connect through external connection of some sort(be it Thunderbolt, or AMD developed one).

The rack is 100% done deal and will become reality at some point. The question is when, and what external connection technology it will use.

 

[Stacc]

Im not sure about Apple. But one of ideas discussed internally in AMD is building their own External GPU rack, to which you connect through external connection of some sort(be it Thunderbolt, or AMD developed one).

The rack is 100% done deal and will become reality at some point. The question is when, and what external connection technology it will use.

Ever since Apple started using thunderbolt I have thought that Apple is well positioned to release an external GPU. Just imagine getting a little puck sized thing that you can use as a docking station that provides lots of a graphics power while at a desk for a laptop. Apple is well positioned to do this since they control the hardware and software.

Now with Thunderbolt 3 and Apple's commitment to AMD I think it could do these things if it chooses to. The barriers here are I am not sure what the demand would actually be and it would probably be costly for what it actually is.

 

[Flint Ironstag]

Im not sure about Apple. But one of ideas discussed internally in AMD is building their own External GPU rack, to which you connect through external connection of some sort(be it Thunderbolt, or AMD developed one).

The rack is 100% done deal and will become reality at some point. The question is when, and what external connection technology it will use.

I'm guessing there are no links to substantiate this claim?

 

[singhs.apps]

Yeah. The 2x/4x multi bay enclosure need to be reasonably priced. Anything above USD 500 to 800 will be a hard sell.

Single bay enclosures already exist and are way over priced ( almost twice the price of an internal solutions )for the reduced performance they give, not to mention more cables to deal with.

Multi bay options already exist :

Netstor TurboBox NA255A
Magma express box 3600
Desktop elite gen 3 systems from cubix

But the price isn't justified. One can assemble proper 4x internal GPU solutions for much less than the price of the enclosures alone

 

[koyoot]

Expect silicon lottery on Ryzen chips. GloFo can only manufacture the 14 nm Chips in Fab8. And it has max capacity of 60K wafers per month. If AMD has so many mouths to feed, and believe me they do have, they have to manufacture Zen chips also at Samsung fabs.

Polaris 10, and 11 is already produced in GloFo fab.

 

[cube]

Expect silicon lottery on Ryzen chips.

That sounds like related to overclocking/unlocking.

 

[koyoot]

That sounds like related to overclocking/unlocking.

Not only. Some chips can autooverclock themselves higher than similar SKU, but from other manufacturer.

 

[cube]

Not only. Some chips can autooverclock themselves higher than similar SKU, but from other manufacturer.

So this is what you actually meant?

 

[koyoot]

So this is what you actually meant?

For example. Two chips: 6 core, 12 Thread, 65W CPU with 3.4 GHz/3.7 GHz. Spec is the same on both. One Silicon is from GLoFo, other from Samsung. One will auto OC with AIO cooler to 4.0 GHz on all cores, other will OC itself on the same situation to max 3.8 GHz.

This is example scenario.