You have no background in this topic and your opinion is irrelevant.
No engineer is going to care if someone not educated in his field of expertise believes in science or not.
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Microsoft Says Windows Laptops With Snapdragon X Elite Will Be Faster Than M3 MacBook Air
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No engineer is going to care if someone not educated in his field of expertise believes in science or not.
Great, now you think I am in search of an engineer validation... What people do nowadays when others simple decide to disagree is almost unbelievable. 😀 who cares... Ah, yes, you.
Apple sucks at engineering and tech development. They're good at marketing, branding and generating large sales volume.
All of which would be meaningless without actually having a great product to walk the talk with. Or are things like Apple silicon just pure marketing hype?
Don’t get me wrong. How Apple built its cult-like fanbase is amazing, but I’m willing to bet it was more luck-based than anything else.All of which would be meaningless without actually having a great product to walk the talk with. Or are things like Apple silicon just pure marketing hype?
Perhaps, but Apple also had to be able to capitalise on that luck and opportunity when it presented itself, and then sustain that momentum and success year after year after year. Nor do I see marketing and advertising as a "dirty word" because its purpose is simply to bring attention to a product said company is selling. At the end of the day, the buyer decides what works best for them and the truth is - plenty of people buy Apple products because that's really what works best for them and again, credit goes back to Apple for making great experiences which people are willing to pay a premium for.
Nooo, please... Don't breaks people dream 😭 are you saying a child is trolling all engineers in the world for so many years?! Even making some come to mac forums to vent?! NOOOOO!
We can see from the disaster that is the Vision Pro that Apple lucked their way to the top.
20+ years is a very long time to be lucky, that's all I am saying.
It actually matters and it matters a lot for portable lightweight laptops. If it can't match the 18-20 hours of battery life of the M3 then it matters. If it runs hot and the chips start throttling and fans spin up and the battery drains out even faster then matters. If it cooks your lap, it matters. This is exactly why Intel is losing out.
Now if we are talking about desktop comptuters that plug into the wall then yes that changes things.
Don't be silly... 20+ years is the minimum amount of time a child that knows how to design chips can be lucky 🧐 You know why? Because it is certified by the official engineer from this thread.
But I never said it didn't matter when those are important considerations. What I said was that those aren't the ONLY considerations and use cases for why every person and business on the planet purchases a laptop. The OP literally said "who cares" to anything other than the singular focus. That was the response and not only does everything you list matter, but also other use cases also....matter.
How do you figure Apple's hardware is inferior?
Especially the Apple Silicon chips are leading the pack, aren't they? Why else would Microsoft feel the need to claim that a new Snapdragon based Laptop is faster than Apple's entry level MacBook?
As for the "20 year old design" and "stale OS", not sure where you take that from.
It is a matter of taste what one considers stale and old.
As is evident in the Apple Silicon chips, right? All branding and advertising. Sure.
I wouldn't answer that question with a simple yes or no, because you are selectively picking your (correct) facts to make a point (in your original post, not here) which is false.
Yes, IPC on Mx hasn't gained much. Yes, all the others have gained significant IPC. But why is that?
It's because their IPC was crap. And it's still not close to Apple's. And gaining IPC gets harder the better it is to start, so getting to 80% of Apple's IPC is no big deal these days, but getting to 90% takes real work, and getting to 100%... well, nobody's managed that so far. Except Apple.
For Apple to be able to maintain IPC while driving up clocks by 25% is a significant accomplishment- but in fact, it's up by some 3% give or take. And it was done (and almost certainly, only possible) by redesigning the cores. So claiming that Apple is standing still is ignorant nonsense. Sure I wish they'd done more. But what they did is *impressive*. To recap:
Single-core - drove up clocks 25% from M1 to M3 while gaining a little IPC, and ALSO while *increasing* efficiency. Though the latter is probably mostly (NOT entirely) process improvements, the former required a significant redesign.
Multi-core - this is even more impressive. On the Max, just from M2 to M3, scaling efficiency is fantastic, losing very little while bumping up P cores by 50% (along with clocks). Comparisons to the M2 Ultra would make the M3 Max look even more impressive, but that would be an error due to Ultrafusion, which necessarily imposes a cost.
I have high hopes for the M4. I expect to be partially disappointed. It's still going to kick ass, and for most applications that don't require performance at any price (or Windows), it will likely still be the best chip by a significant margin. ...from an engineering standpoint. From a consumer's, it will depend on relative pricing of course, along with many other things that vary from person to person.
Your fundamental premise is correct (unit errors aside, which are egregious). Your application of it completely fails, because the numbers matter. You really are "preserving" a lot of energy using M chips.
The base M3 is faster than many x86 chips, and slower than others. But it doesn't consume half the energy while doing half the work. It's more like a quarter of the energy, for roughly the same work. (And yes, I'm pulling those numbers out of my ass, because it's unlikely that anyone on this planet can give you average power and performance figures for "all PC laptops" or "all PCs" but they are in fact, much more close to accurate than yours.)
For general CPU tasks, the M series chips are the most efficient that exist. Better than Intel, better than AMD, and (according to all published benchmarks so far) better than this new Snapdragon. There are certainly tasks for which more raw power is a worthwhile choice, but most people don't do those tasks, except for one (playing games). Even many professional users.
To understand the difference between power and energy, see for example https://en.wikipedia.org/wiki/Watt#Distinction_between_watts_and_watt-hours
Most posters here don't bother to read the article in full, much less comments with more useful info (like mine and a few others). It's just nonsense.
The chip can run at 20w or 80w or anything in between (and probably a bit higher, we'll see). At the low power, it loses to M3 at everything. At the high power, it's roughly like the M3 Pro, which is a pretty poor showing as the M3 Pro has half the P cores, along with 6 E cores which are roughly equal to 2 P cores. So it uses more power than the M3, and ~50% more cores (where 3E = 1P) to get to roughly the same place.
That's a joke, right? I mean, you don't really think Apple uses ARM's cores, do you?
In any case, there's already a performance gap to the M3 (or M3 Pro, depending on power profile) - though as I've said a couple times before, talking about performance without looking at the price is meaningless. If MS sells this thing at the same price as an Air, then it will be compared to the Air.
No, that was only true for a little while when the M1 came out, IIRC. The Intel cores running at 6+GHz are somewhat faster than M3 cores running at 4.05GHz. Not even close to 50% faster, because their IPC is poor compared to the M3. And they consume... I don't recall, but several times the power the M3 uses. I believe AMD's fastest cores are close to Intel's and therefore also faster than Apple's, though again with worse IPC, and much worse efficiency, though notably better than Intel's.
This is a very interesting point! I suspect that you're not quite right though - I think that as more custom-designed cores (like QC's) come out, you're going to see them target different levels of the ISA. So I am pretty sure contemporary Windows will run on M9 (or whatever) just fine, and so will most apps, though a few may not.
This is still great for Mac users who have to run Windows under Parallels/VMWare/whatever. Their windows VMs will benefit from this. So it's a win all around, even if it turns out not to be as fast as Rosetta at some/all things.
OK, but the clock on the M3 is already 4.1 GHz. Up 9.4% on the M2 (ignoring the M2 Max), then another 17% on the M3.
This approach isn't sustainable. Within two or three generations, they'd be at 5 GHz.
Yes, but there is a way to do this where your claims are at least somewhat credible and not out-and-out lies.
Over the past 12 years or so, Microsoft have promised amazing performance with their ARM-powered Windows laptops but those promises simply haven't panned out.
Fool me once, shame on you...
Not going to happen soon or might not happen at all. Windows is a mammoth not because of its an operating system by Microsoft but because of the third party hardware software it carries on its shoulder. It will be interesting to see if those devs, both on the hardware and software side are willing to make a version for ARM. It's a huge resouce to pour in. Apple pulled it off as there was a clear dead-end on Intel-mac road map. The devs have to change the lane, no option. That compulsion is not there on the Windows side. Unless they too put a visible dead-end.
That’s all TSMC. Designing chips is child’s play. There’s no benefit to the consumer. It’s mostly marketing.
Holy cow. There's been a ton of ignorance and nonsense in this thread (unsurprisingly), but this... is next-level. I thought the poster was joking at first (the username is hilarious), but their arguments with others here who know a bit more show that they're serious. I'm not going to respond to everything - it's not worth engaging with them, as shown by others who have already tried. But for the benefit of anyone reading them here are some corrections.
Possibly the dumbest comment ever posted on MR. (Ok, maybe not, that's a very high bar!) That "curve" doesn't exist in a vacuum. The notion that the chip design is meaningless is ... more wrong than mustard on ice cream. It's laughable. For a simple proof of the sheer stupidity of it, consider two different core designs on the SAME process: Apple's P and E cores. There's roughly a factor of 3 difference in performance. Or look at Intel's P & E cores - the difference is even larger. Naturally, in both cases, the P cores are a LOT larger. Design with more transistors, you can get a faster core. Pretty basic.
You could also compare Apple's older N7 cores (A12 or A13) with another vendor's N7 core. The differences are stark.
Lastly, as I mentioned in a previous post, design will determine the highest clock you can run a chip at. In the language of the P-E curve, the curve doesn't extend forever. It cuts off at a certain point, beyond which more power won't get you any more performance, because the design is literally not capable of it.
Nearly everything above is wrong. The two parts that are correct are:
1) Yield and pricing do matter, and are a direct consequence of area
2) The PPW curve is generally as stated. QC *is* playing in both "area"s to some extent already, by selling the chip as useful at both 20ish and 80ish W.
As for the choice of where you want to be on the curve... you just choose. You run your design at a higher or lower power (or equivalently, clocks), and that determines where you are on the curve.
HOWEVER, that's not *really* true, because - as I already mentioned above, and at greater lengths in previous posts - the design has a major impact on how fast you can actually run your core (and your uncore, but let's not get too far into the weeds). It will also have a particular part of the frequency curve where you get the best efficiency, which is entirely dependent on the design. So yes, you can pick your clock, but your design constrains you.
N3 variants (not "generations") (E, P, X, etc.) are indeed smaller changes, but not all of them improve PPA. For example, X is about high power applications, and will likely relax some design rules... which is fine, because such designs can't go that dense anyway.
Calling design "child's play and an intellectual joke" demonstrates complete ignorance, and probably psychological issues I'm not qualified to diagnose.
...and now it starts to become clear why this person is so dismissive of Apple. The DEI etc. comment makes it clear that engineering isn't motivating these many posts, but rather politics. Which I could really stand NOT to have to hear about for five frickin' minutes out of my day, please.
Wow. Pot, meet kettle. Take some classes, then come back here.
Possibly the dumbest comment ever posted on MR. (Ok, maybe not, that's a very high bar!) That "curve" doesn't exist in a vacuum. The notion that the chip design is meaningless is ... more wrong than mustard on ice cream. It's laughable. For a simple proof of the sheer stupidity of it, consider two different core designs on the SAME process: Apple's P and E cores. There's roughly a factor of 3 difference in performance. Or look at Intel's P & E cores - the difference is even larger. Naturally, in both cases, the P cores are a LOT larger. Design with more transistors, you can get a faster core. Pretty basic.
You could also compare Apple's older N7 cores (A12 or A13) with another vendor's N7 core. The differences are stark.
Lastly, as I mentioned in a previous post, design will determine the highest clock you can run a chip at. In the language of the P-E curve, the curve doesn't extend forever. It cuts off at a certain point, beyond which more power won't get you any more performance, because the design is literally not capable of it.
Nearly everything above is wrong. The two parts that are correct are:
1) Yield and pricing do matter, and are a direct consequence of area
2) The PPW curve is generally as stated. QC *is* playing in both "area"s to some extent already, by selling the chip as useful at both 20ish and 80ish W.
This is 99.9% wrong. The flimflam about P-E curves in the first paragraph is irrelevant to the second, and in any case incorrect - when a single area-reduction number is quoted, it's for a "typical" mix of logic, SRAM, and analog, which mix is chosen by the foundry, usually derived from an actual chip design. If you look in more detail, they'll quote specific numbers for each of those. For example, TSMC quoted area improvements of 1.7x for logic going from N5 to N3, but only 1.2x for SRAM and 1.1x for analog. (And it turned out the SRAM improvement wasn't nearly that good, in the end.)
As for the choice of where you want to be on the curve... you just choose. You run your design at a higher or lower power (or equivalently, clocks), and that determines where you are on the curve.
HOWEVER, that's not *really* true, because - as I already mentioned above, and at greater lengths in previous posts - the design has a major impact on how fast you can actually run your core (and your uncore, but let's not get too far into the weeds). It will also have a particular part of the frequency curve where you get the best efficiency, which is entirely dependent on the design. So yes, you can pick your clock, but your design constrains you.
Yeah, this is all garbage. A bunch of people with short fuses got the idea that N3 was bad when it first came out, and all sorts of nonsense was published. As it turns out, N3 seems to have landed where it was supposed to. The one slightly unexpected shortcoming, as I mentioned earlier, was that SRAM cells only shrank about 5% compared to N5. There were also big concerns about yield at the start. I don't think anyone who actually knows about this is telling, but the general consensus seems to be that it's fine, and within the limits of the info presented in their financial statements, that appears to be true.
Calling Intel's process 10nm is arguing about semantics... but is also wrong. They're currently producing the old intel "7nm" which is now called "Intel 4". The old 10nmSF is now called Intel 7 and that's been up for a while now. You can remark snidely on their need to rename to keep up appearances, and you'd be right, but it's also true that the old names were less dishonest than the names used by other foundries (TSMC, Samsung, etc.) There is no feature in "3nm" chips that gets anywhere near to being 3nm in actual size. Intel 4 is roughly equivalent to TSMC N4, so if you're going to accept one name you should accept the other.
N3 variants (not "generations") (E, P, X, etc.) are indeed smaller changes, but not all of them improve PPA. For example, X is about high power applications, and will likely relax some design rules... which is fine, because such designs can't go that dense anyway.
Calling design "child's play and an intellectual joke" demonstrates complete ignorance, and probably psychological issues I'm not qualified to diagnose.
...and now it starts to become clear why this person is so dismissive of Apple. The DEI etc. comment makes it clear that engineering isn't motivating these many posts, but rather politics. Which I could really stand NOT to have to hear about for five frickin' minutes out of my day, please.
Wow. Pot, meet kettle. Take some classes, then come back here.
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Of course. And perhaps they'll actually do that for their desktops (I doubt it, but it's not impossible).
No single approach is endlessly sustainable. One year you improve the NoC, another you work on the cache hierarchy, then you tackle the OoO resources, then you're onto prefetchers and branch prediction... etc. Except you tend to do a few of those at once. In the future, everyone think more special-purpose engines will be a big factor. Focusing on one approach would be a recipe for failure. You work on something until better ideas come around, then you work on those.
The question is always, what's the smartest way to spend engineering time, transistors, and energy? (Notice those all come down to money in different ways). And slightly more subtly, what is "smartest" in this context?
They decided that for the M3, the smartest way involved allowing for higher clocks. It also involved a LOT of other stuff, in other core types, in the NoC, and the rest of it all- but that alone was a substantial investment in engineering time.
When the M4 comes around, who can say what they'll focus on? We won't know until we see it.
Right. I guess I'm just a bit surprised they went (mostly) for clock for the second time in a row.