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14” 10 core CPU 14 core GPU 512GB SSD starting from ~$1799
14” 10 core CPU 16 core GPU 1TB SSD starting from ~$2099
16” 10 core CPU 28 core GPU 512GB SSD starting from ~$2399
16” 10 core CPU 32 core GPU 1TB SSD starting from ~$2799
Both 14” and 16” gets Mini-LED as standard
What are your thoughts?
 
My bad, I haven't come across them yet!

If you are interested, you can have a look at this

 
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That's what I want if it's got at least 32G of RAM, but I don't really share your optimism on cost. More like $2999. I've spent an awful lot of money on Apple hardware...
+$400 for 32 gigs which bumps up the price to $2499 imo it is quite possible
 
+$400 for 32 gigs which bumps up the price to $2499 imo it is quite possible
One can hope.

I was mainly comparing it to my 2017 MBP 15", and I seem to remember it being a lot more. (i7, 32G RAM, 2TB ssd) That 2TB SSD would make a pretty good difference, so maybe you're right.
 
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If you are interested, you can have a look at this

You think AMD pays apple for patent use (for their chiplet)?
 
We could / should end up with six options:

  • 8 CPU (4P+4E) and 7 GPUs ("Tonga")
  • 8 CPU (4P+4E) and 8 GPUs ("Tonga")
  • 10 CPU (8P+2E) and 16 GPUs ("JadeC-Chop")
  • 10 CPU (8P+2E) and 32 GPUs ("JadeC")
  • 20 CPU (16P+4E) and 64 GPUs ("Jade2C")
  • 40 CPU (32P+8E) and 128 GPUs ("Jade 4C")
Or this would be much better for many people:
  • 16 CPU and 10 GPUs ("JadeC-Chop") +32/+64 GB DDR5 RAM +2/+4/+8 TB SSD
  • 32 CPU and 10 GPUs ("JadeC") +64/+128 GB DDR5 RAM +4/+8 TB SSD
  • 64 CPU and 20 GPUs ("Jade2C") +128/+256 GB DDR5 RAM +8/+16 TB SSD
  • 128 CPU and 40 GPUs ("Jade 4C") +256/+512 GB DDR5 RAM +16/+32 TB SSD
The competitors will come with DDR5 RAM and 8 TB SSD this year. = Apple can’t stay behind.
 
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You think AMD pays apple for patent use (for their chiplet)?

I am neither a patent lawyer nor a chip designer, so I really couldn’t tell, but my amateur impression was that Appleˋs patent describes chips „stitched together“ with an interface bar, while AMD uses traditional signal routing through package substrate.
 
I am neither a patent lawyer nor a chip designer, so I really couldn’t tell, but my amateur impression was that Appleˋs patent describes chips „stitched together“ with an interface bar, while AMD uses traditional signal routing through package substrate.
The infinity fabric doesn’t count?
 
Or this would be much better for many people:
  • 16 CPU and 10 GPUs ("JadeC-Chop") +32/+64 GB DDR5 RAM +2/+4/+8 TB SSD
  • 32 CPU and 10 GPUs ("JadeC") +64/+128 GB DDR5 RAM +4/+8 TB SSD
  • 64 CPU and 20 GPUs ("Jade2C") +128/+256 GB DDR5 RAM +8/+16 TB SSD
  • 128 CPU and 40 GPUs ("Jade 4C") +256/+512 GB DDR5 RAM +16/+32 TB SSD
The competitors will come with DDR5 RAM and 8 TB SSD this year. = Apple can’t stay behind.

Actually, no, not really. You reach a point of inflection where adding more CPU cores is not a net gain. The interconnects and cache management issues become increasingly burdensome for only marginal gain.

Apple currently has a pretty good single-core-performance lead, and they continue to work on improving that. A few better cores will earn more than just piling on more ordinary cores. For the vast majority of prospective users, you probably start to pass the point of inflection around 16.

The GPU and NN, though, that is another matter entirely.
 
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Or this would be much better for many people:
  • 16 CPU and 10 GPUs ("JadeC-Chop") +32/+64 GB DDR5 RAM +2/+4/+8 TB SSD
  • 32 CPU and 10 GPUs ("JadeC") +64/+128 GB DDR5 RAM +4/+8 TB SSD
  • 64 CPU and 20 GPUs ("Jade2C") +128/+256 GB DDR5 RAM +8/+16 TB SSD
  • 128 CPU and 40 GPUs ("Jade 4C") +256/+512 GB DDR5 RAM +16/+32 TB SSD
The competitors will come with DDR5 RAM and 8 TB SSD this year. = Apple can’t stay behind.

Iˋm not sure that we have the same definition of „many“. Just to give you some context, a 32-core CPU using current M1 tech would be close to a 64-core EPYC CPU. Are you trying to tell us that „many people“ need an equivalent of a 256-core AMD server platform?
 
Speaking of core counts can someone explain to me the idea of using a number of cores that isn’t a power of 2? I was under the assumption that it scaled 2->4->8->16 and so on, but apparently this isn’t the case.
 
Speaking of core counts can someone explain to me the idea of using a number of cores that isn’t a power of 2? I was under the assumption that it scaled 2->4->8->16 and so on, but apparently this isn’t the case.
The A4 is a 1-core chip, as were pretty much all phone chips around that time, and certainly before... Apple don't seem to have any particular hang up about odd core numbers, their first >2 core design, the A8X, had 3, then the A10X had 6, 3 high power Hurricane, and 3 high efficiency Zephyr.

I don't know where the powers of 2 thing comes from, but Intel also had core solos until the mid '00s.
 
The A4 is a 1-core chip, as were pretty much all phone chips around that time, and certainly before... Apple don't seem to have any particular hang up about odd core numbers, their first >2 core design, the A8X, had 3, then the A10X had 6, 3 high power Hurricane, and 3 high efficiency Zephyr.

I don't know where the powers of 2 thing comes from, but Intel also had core solos until the mid '00s.
The number 1 is still a power of 2. (2^0 = 1) 😉

But yeah I think it’s mostly because power of 2 is cool in Computer Science. As a programmer I tend to set arbitrary variables to power of 2s just because.

Otherwise it might also be that chip designers prefer to make symmetrical designs, including even numbers like hexa-core, deca-core, and 12-core.
 
Speaking of core counts can someone explain to me the idea of using a number of cores that isn’t a power of 2? I was under the assumption that it scaled 2->4->8->16 and so on, but apparently this isn’t the case.
There’s nothing magical about making the number of cores a power of 2. It’s convenient sometimes - after all, if each core needs an identifier, since we are in binary, if i reserve N bits for that I can represent 2^N different cores. And that sort of thing plays out all over the place (bus IDs, cache ports, etc). But the number of cores is determined primarily based on performance, power, and physical space considerations.
 
That's what I want if it's got at least 32G of RAM, but I don't really share your optimism on cost. More like $2999. I've spent an awful lot of money on Apple hardware...
This would be my preferred spec as well:
14" (non bothered about mini-LED)
8p+2e CPU
16-core GPU (if close enough to AMD 5600M performance)
1TB SSD
32GB RAM

I would expect this to be closer to US$3000 as well.
 
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We don’t know this. And we don’t know how they will bin processors. The 10-core and 20-core could be a binned chip for all we know.
We do know this according to the Bloomberg report/some Twitter source.

One full die has 10 CPU cores. They glue two together to make 20.

It doesn't make sense for 10-Core SoCs to be binned chips unless there is another SoC manufactured to have 10 to 20 cores. For example, if Apple manufactures a 12-Core SoC, then they can disable two defective cores and have a 10-Core SoC. Bloomberg didn't report a SoC between 10 to 20 core in design.

Regardless, that's still binning.

I suggest reading some basics on binning: https://www.techspot.com/article/2039-chip-binning/

When you start making SoCs with 8+ cores and tens/hundreds of GPU cores, you have to bin or your margins go down the toilet. Not even Apple chips can defy physics.

We're going to have SoCs with 8 cores, 10 cores, 16 cores, 18 cores, 20 cores, etc. It's only a matter of time. Maybe when new MBPs first launch, they will only have 10 or 20 cores but additional bins will surface once enough defective chips accumulate. And it also depends on how good TSMC's 5nm defective rate is which is reportedly very good.
 
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We do know this according to the Bloomberg report/some Twitter source.

One full die has 10 CPU cores. They glue two together to make 20.

The logical flaw is that the ten core design was described as 8+2 – if you want the higher performance of 20, ending up with 16+4 does not really sound like the kind of gain you are looking for. If 2 little cores can easily handle the light duty workload, you would want two extra big cores (18+2) to get better performance on the high end.
 
We do know this according to the Bloomberg report/some Twitter source.

One full die has 10 CPU cores. They glue two together to make 20.

It doesn't make sense for 10-Core SoCs to be binned chips unless there is another SoC manufactured to have 10 to 20 cores. For example, if Apple manufactures a 12-Core SoC, then they can disable two defective cores and have a 10-Core SoC. Bloomberg didn't report a SoC between 10 to 20 core in design.

Regardless, that's still binning.

I suggest reading some basics on binning: https://www.techspot.com/article/2039-chip-binning/

When you start making SoCs with 8+ cores and tens/hundreds of GPU cores, you have to bin or your margins go down the toilet. Not even Apple chips can defy physics.

We're going to have SoCs with 8 cores, 10 cores, 16 cores, 18 cores, 20 cores, etc. It's only a matter of time. Maybe when new MBPs first launch, they will only have 10 or 20 cores but additional bins will surface once enough defective chips accumulate. And it also depends on how good TSMC's 5nm defective rate is which is reportedly very good.
I understand binning. Show me where Gurman confirmed that we’re going to have 10, 16, 18, 20 core chips.

I’m not saying it’s not going to happen but Gurman didn’t confirm this. All he said was we would get a 10-core, 20-core, and 40-core chip. He didn’t mention binning. So all of that is just guesswork. Not confirmed.
 
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