The case of an Ultra chip using two M2 Pro chips

[dmccloud]

Not needed to be listed to be a consumer, even you as member may request not to be listed.


LMFAO.

In public statements press releases and idiotic Gurman letters sure not, but both CXL (not CLX) & UCIe are part of the M2 pro/max family as it's DDR5 RAM, apple never ever showcase which technologies they are working on unless three things happens: are ready for sell and are developers or co-developed by Apple (as arm adoption) or as matter of standards need to be assumed and exposed (as was thunderbolt 1-3, now apple omiss having thunderbolt but uses USB4 instead).

Time will say a lot and shut up few big mouth.

The DDR specifications are set by JEDEC, which is completely independent of anything relating to CXL, UCIe, or anything else you try to connect to Apple Silicon. Remember that Apple's license for the ARM ISA gives them the freedom to build their own version of the instruction set, so they're already not necessarily "stock" with the core logic in their SoCs. Some of Apple's additions and modifications to the ISA have been wrapped into ARM's stock ISA because of the performance gains. Again, Apple is designing their systems and handing off production to TSMC - the latter does not have any input into the design process beyond what process nodes are usable and/or available.

 

[theorist9]

Not needed to be listed to be a consumer

You know that wasn't what we were discussing. It was whether they were a consortium member. Buying stuff from a company that's a consortium member does not make you a consortium member. By your argument, since Apple is one of Samsung's customers, it is therefore a member of every consortium of which Samsung is a member.

even you as member may request not to be listed.

So you're saying Apple is a secret member of this consortium? Like it's the Illuminati? Do you have any basis for this?

 

[Mago]

You know that wasn't what we were discussing. It was whether they were a consortium member. Buying stuff from a company that's a consortium member does not make you a consortium member. By your argument, since Apple is one of Samsung's customers, it is therefore a member of every consortium of which Samsung is a member.

So you're saying Apple is a secret member of this consortium? Like it's the Illuminati? Do you have any basis for this?

Until apple explicit and publicly denies will to use some technology or standard, it is on the cards, not the first time Apple readies something in moreless secret.

That renders moot your rant.

I'm not here saying that based on leaks or 'leaks' from X-moron, I'm here bringing you an opinion as engineer, I'm pretty confident to say you apple is using both CXL and UCIe in their M2-max chips at least (there are suspicious m2-pro but it's more complex as the m2 pro never was aimed at modular systems).

See you at WWDC. (Pin my messages and ashame me that day if I'm at least 25% wrong).

 

[Mago]

Again, Apple is designing their systems and handing off production to TSMC - the latter does not have any input into the design process beyond what process nodes are usable and/or available

FYI 'apple's UltraFusion is an rebrand for TSMC's CoWoS-S or LiFO-LSi (UF+), indeed apple actually don't do all their engineering 'in house' as every corporation something is handoff to subcontractors, specifically ASE is the most important engineering subcontractor related to Apple Silicon integration as TSMC (IP,FAB) and ARM which provides it's IP (CoWoS-S, LiFO-LSi, UCIe, and CXL). Just won't expect Apples naming that technologies according their suppliers, as CoWoS-S was rebranded as UltraFusion likely UCIe and CXL will arrive with some fancy Applesque brandinng.

C.U.

 

[theorist9]

Until apple explicit and publicly denies will to use some technology or standard, it is on the cards, not the first time Apple readies something in moreless secret.

That renders moot your rant.

I'm not here saying that based on leaks or 'leaks' from X-moron, I'm here bringing you an opinion as engineer, I'm pretty confident to say you apple is using both CXL and UCIe in their M2-max chips at least (there are suspicious m2-pro but it's more complex as the m2 pro never was aimed at modular systems).

See you at WWDC. (Pin my messages and ashame me that day if I'm at least 25% wrong).

You're the one who's been ranting ("X-moron", etc.), not me.

And I don't need to wait until WWDC, I can tell you right now you've been wrong in this discussion.

I made the following statement, which is factually correct: Apple is not a member of UCIe.
You replied that this is "wrong", which is factually incorrect.

Simple as that. If you really were an engineer, you'd understand that.

 

[dmccloud]

FYI 'apple's UltraFusion is an rebrand for TSMC's CoWoS-S or LiFO-LSi (UF+), indeed apple actually don't do all their engineering 'in house' as every corporation something is handoff to subcontractors, specifically ASE is the most important engineering subcontractor related to Apple Silicon integration as TSMC (IP,FAB) and ARM which provides it's IP (CoWoS-S, LiFO-LSi, UCIe, and CXL). Just won't expect Apples naming that technologies according their suppliers, as CoWoS-S was rebranded as UltraFusion likely UCIe and CXL will arrive with some fancy Applesque brandin

You're standing on an island with this one, without even the slightest shred of evidence or factual information to back up these claims. As I stated earlier correlation does NOT equal causation, and neither TSMCs nor ASEs connections to UCIe are relevant to what Apple is doing with its own silicon.

 

[Mago]

You're the one who's been ranting ("X-moron", etc.), not me.

And I don't need to wait until WWDC, I can tell you right now you've been wrong in this discussion.

I made the following statement, which is factually correct: Apple is not a member of UCIe.
You replied that this is "wrong", which is factually incorrect.

Simple as that. If you really were an engineer, you'd understand that.

Facts is apple don't need to be member of UCIe to include it at some product (fyi UCIe is needed to interface with tb4, PCIe5 IP).

CXL is central an key for the Mac Pro scalability GPU and RAM, without CXL there is no business case for a Mac Pro, this and inFO-LSI where the technologies that prevented we have an M1 Mac Pro.

I leave your rant here, what you name facts are: rumors from morons as Gurman, of lack of official press release assuming apple will never ever do that (fact no body believe the Mac Studio to launch with chiplets technology, then magically m1 ultra become a fact).

C.u.

 

[theorist9]

Facts is apple don't need to be member of UCIe to include it at some product (fyi UCIe is needed to interface with tb4, PCIe5 IP).

CXL is central an key for the Mac Pro scalability GPU and RAM, without CXL there is no business case for a Mac Pro, this and inFO-LSI where the technologies that prevented we have an M1 Mac Pro.

I leave your rant here, what you name facts are: rumors from morons as Gurman, of lack of official press release assuming apple will never ever do that (fact no body believe the Mac Studio to launch with chiplets technology, then magically m1 ultra become a fact).

C.u.

There's a basic failure of logic here. What I named as fact is that Apple is not a member of UCIe. That's it. You seem to think that, because there's a possibility of them becoming a member in the future, it becomes "wrong" to say they're not a member now. This is simply incoherent. And attempting to label anything you disagree with as a "rant" doesn't fool anyone.

 

[dmccloud]

Facts is apple don't need to be member of UCIe to include it at some product (fyi UCIe is needed to interface with tb4, PCIe5 IP).

CXL is central an key for the Mac Pro scalability GPU and RAM, without CXL there is no business case for a Mac Pro, this and inFO-LSI where the technologies that prevented we have an M1 Mac Pro.

I leave your rant here, what you name facts are: rumors from morons as Gurman, of lack of official press release assuming apple will never ever do that (fact no body believe the Mac Studio to launch with chiplets technology, then magically m1 ultra become a fact).

C.u.

Fact #1: UCIe and Thunderbolt are mutually exclusive projects. While UCie is focused on creating a universal standard to promote interoperability between chiplets, Thunderbolt is a data transfer protocol. Apple and Intel have jointly developed the Thunderbolt specification since its inception.

Fact #2: The thunderbolt specification has been (and still is) wholly independent of UCIe, and there is no such requirement for TB4 to include UCIe, as one is a data transport spec and one is a design spec for integrated chiplets.

Fact #3: The purpose of UCIe is to create a standard between interoperability between manufacturers (i.e., pairing one component from Intel with a separate component from Samsung, AMD, etc). Since Apple is designing their SoCs in house, there is no need for UCIe interoperability on-die, nor are they required by TSMC to add such support to SoCs they have designed wholly in-house. Keep in mind that the UCIe standard does not apply to on-die RAM, which is really the only third-party component on the Mx series dies. For accurate information on what UCIe actually is and does, read this link.

To that end, today Intel, AMD, Arm, and all three leading-edge foundries are coming together to announce that they are forming a new and open standard for chiplet interconnects, which is aptly being named Universal Chiplet Interconnect Express, or UCIe. Taking significant inspiration from the very successful PCI-Express playbook, with UCIe the involved firms are creating a standard for connecting chiplets, with the goal of having a single set of standards that not only simplify the process for all involved, but lead the way towards full interoperability between chiplets from different manufacturers, allowing chips to mix-and-match chiplets as chip makers see fit.

 

[Mago]

There's a basic failure of logic here. What I named as fact is that Apple is not a member of UCIe. That's it. You seem to think that, because there's a possibility of them becoming a member in the future, it becomes "wrong" to say they're not a member now. This is simply incoherent. And attempting to label anything you disagree with as a "rant" doesn't fool anyone.

Blah blah. I'll keep this thread pinned

 

[Mago]

Thunderbolt is a data transfer protocol.

Fact thunderbolt it's implemented thru an Chip (IP) it has to be integrated into PCIe5, all industry PCIe5 IP is built around UCIe unless you want to deal with interoperability by yourself assuming delays bugs etc by your independent implementation (apple still buying Intel tb4 IP).

wholly independent of UCIe, and there is no such requirement for TB4 to include UCIe

If your buses stay at PCIe3 that's right, M2 adopted PCIe5 indeed associated IP in the chiplet require UCIe.

Since Apple is designing their SoCs in house, there is no need for UCIe interoperability on-die

UCIe is mandatory if you want to integrate IP from foreign providers as USB4, PCIe5, network, DDR5 ram, apple don't develop such technologies, adopting it requires to adopt UCIe if you want to bake it into your dies or chiplets.

Being UCIe members or associate is required if you want to sell your design to other industry members as you need to adapt your IP to interop with an common standard, but if you want to add ucie products into your chips you don't need being part of UCIe just subcontract the related members (arm tsmc ase).

 

[dmccloud]

Fact thunderbolt it's implemented thru an Chip (IP) it has to be integrated into PCIe5, all industry PCIe5 IP is built around UCIe unless you want to deal with interoperability by yourself assuming delays bugs etc by your independent implementation (apple still buying Intel tb4 IP).



If your buses stay at PCIe3 that's right, M2 adopted PCIe5 indeed associated IP in the chiplet require UCIe.



UCIe is mandatory if you want to integrate IP from foreign providers as USB4, PCIe5, network, DDR5 ram, apple don't develop such technologies, adopting it requires to adopt UCIe if you want to bake it into your dies or chiplets.

Being UCIe members or associate is required if you want to sell your design to other industry members as you need to adapt your IP to interop with an common standard, but if you want to add ucie products into your chips you don't need being part of UCIe just subcontract the related members (arm tsmc ase).

UCIe is NOT mandatory. It's an "open standard", which simply means it's royalty-free, but not mandatory. It's also specific to connecting chiplets from different manufacturers, which excludes RAM by definition. It creates a unified standard for connecting chiplets from different manufacturers, but it does not mandate use of the spec. That's the part you seem to consistently miss.

Also, your claim that PCIe5 is built around UCIe is flat out wrong. UCIe was introduced in March 2022, PCIe5 and PCIe6 were introduced in 2019, three years before that. The only version of the PCIe spec released after the UCIe announcement was PCIe7, and even that makes no mention of UCIe because again it's a completely separate specification.

 

[theorist9]

Blah blah. I'll keep this thread pinned

Yes, please be sure to let us know if I was wrong in my statement, which is that Apple is not a member of UCIe as of this date. If it turns out Apple is currently a "hidden" member, as you've suggested, I'm sure we'd all be interested to learn this. I am agnostic on whether or not Apple will join in the future. I just know what UCIe's website says now.

 

[Mago]

UCIe is NOT mandatory. It's an "open standard", which simply means it's royalty-free, but not mandatory. It's also specific to connecting chiplets from different manufacturers, which excludes RAM by definition. It creates a unified standard for connecting chiplets from different manufacturers, but it does not mandate use of the spec. That's the part you seem to consistently miss.

Also, your claim that PCIe5 is built around UCIe is flat out wrong. UCIe was introduced in March 2022, PCIe5 and PCIe6 were introduced in 2019, three years before that. The only version of the PCIe spec released after the UCIe announcement was PCIe7, and even that makes no mention of UCIe because again it's a completely separate specification.

Good luck finding PCIe5 IP not built on UCIe.

 

[theorist9]

Fact #1: UCIe and Thunderbolt are mutually exclusive projects. While UCie is focused on creating a universal standard to promote interoperability between chiplets, Thunderbolt is a data transfer protocol. Apple and Intel have jointly developed the Thunderbolt specification since its inception.

Fact #2: The thunderbolt specification has been (and still is) wholly independent of UCIe, and there is no such requirement for TB4 to include UCIe, as one is a data transport spec and one is a design spec for integrated chiplets.

Fact #3: The purpose of UCIe is to create a standard between interoperability between manufacturers (i.e., pairing one component from Intel with a separate component from Samsung, AMD, etc). Since Apple is designing their SoCs in house, there is no need for UCIe interoperability on-die, nor are they required by TSMC to add such support to SoCs they have designed wholly in-house. Keep in mind that the UCIe standard does not apply to on-die RAM, which is really the only third-party component on the Mx series dies. For accurate information on what UCIe actually is and does, read this link.

Here's an interesting article comparing UCIe with other standards, like BoW (Bunch of Wires):

Is UCIe Really Universal?

Why developing a multi-vendor standard for plug-and-play chiplets is so difficult.

semiengineering.com

Here's an excerpt from the article. The first para is from a BoW proponent, the second from a UCIe employee:

“UCIe took the approach of ultimate interoperability at the sacrifice of everything else,” says Elad Alon, co-founder and CEO of Blue Cheetah and adjunct professor at UC Berkeley. “They took this PCIe, PCB notion of things, and tried to force that into the chiplet space. A whole lot of overhead was added, which for the vast majority of cases is not necessary. More importantly, it excludes important segments of the overall market from participating because of cost. For example, it disallowed you from using packages with less than a certain number of layers. Ultimate interoperability comes at the expense of things people care about, such as cost, performance, complexity, power, and things of this nature.”

Still, that’s not necessarily all bad. “The PCI and CXL protocols do carry some legacy that is not desirable for some applications,” said Manuel Mota, senior product manager for UCIe IP at Synopsys. “That’s where some people get shocked. But it’s not the only way of using it. The streaming protocol is an excellent example. It enables very lightweight, very low-latency implementations that extend wires from one fabric, on one SoC, to another SoC, and that covers a lot of the use cases we see in the market. It is a step in the right direction for the chiplet ecosystem. Other standards and proprietary implementations are not enabling that, at least at this stage, because they are not complete, because they are relying on implementation decisions, on critical aspects that define their operation.”

Both sides believe time will show them to be right.

 

[leman]

Until apple explicit and publicly denies will to use some technology or standard, it is on the cards, not the first time Apple readies something in moreless secret.

That‘s an interesting rhetorics. So Apple being completely absent from any committee is evidence that Apple is secretly involved in the commitee?

I'm pretty confident to say you apple is using both CXL and UCIe in their M2-max chips at least (there are suspicious m2-pro but it's more complex as the m2 pro never was aimed at modular systems).

In which capacity? I would be curious what kind of evidence, direct or indirect, you have for claiming this.

FYI 'apple's UltraFusion is an rebrand for TSMC's CoWoS-S or LiFO-LSi (UF+)

You are confusing the manufacturing process used to build the package and the interface. Yes, the manufacturing process is TSMC. The interface is Apple.

likely UCIe and CXL will arrive with some fancy Applesque brandinng.

Apple doesn’t need any of these technologies to scale their chips, they have their own solutions with lower overhead and higher performance.

CXL is central an key for the Mac Pro scalability GPU and RAM, without CXL there is no business case for a Mac Pro, this and inFO-LSI where the technologies that prevented we have an M1 Mac Pro.

It really isn’t (see above). They only need it for interfacing with third-party hardware. Admittedly, RAM over PCIe would be an interesting solution to RAM expansion. But I just as much see Apple rolling their own proprietary solution for this.

Facts is apple don't need to be member of UCIe to include it at some product (fyi UCIe is needed to interface with tb4, PCIe5 IP).

What? We had TB4 and PCI5 for years. UCIe spec was only released recently. What kind of interfacing are you talking about?

 

[leman]

Good luck finding PCIe5 IP not built on UCIe.

I don't follow your logic. It is entirely possible that the handful of currently shipping PCIe5 implementations have something to do with CXL and/or UCIe. If I remember correctly, CXL is explicitly mentioned with regards to the newest Intel and AMD server processors. But none this means that Apple has to implement these as well if they want PCIe5 or later.

Don't get me wrong, I do think that it will make sense for Apple to support CXL, as it will make the Mac Pro more versatile going forward. UCIe though? I see absolutely no value for Apple in this technology.

 

[Mago]

they have their own solutions with lower overhead and higher performance.

Apple IP R&D is for controlling the production chain saving costs avoiding 3rd party traps (as cuda), not for being absolute selfish doing everything, you're eating so much propaganda.

It is entirely possible that the handful of currently shipping PCIe5 implementations have something to do with CXL and/or UCIe.

Not all PCIe5 using CXL except those aimed at workstations and servers. On the other hand pcie5 IP is built around UCIe for integration convenience (aka adding someone's IP into your chips), industry may often taylor some IP to address some customers implementation but before solving it's issues with mainstream market, thats what UCIe does saving r&d on interfacing a bunch of IP from different vendors

That‘s an interesting rhetorics.

Same as claiming because Apple didn't or promised that it will never do something.

you have for claiming this.

All the pot ashes at my office, as Gurman also to expose his 'evidence'.

Yes, the manufacturing process is TSMC. The interface is Apple

FYI is TSMC who claim this:

TSMC recently confirmed that Apple used its InFO_LI packaging method to build its M1 Ultra

TSMC Clarifies Apple's UltraFusion Chip-to-Chip Interconnect

InFO_LI, not CoWoS, says TSMC.

www.tomshardware.com

Apple’s M1 Ultra Does Use InFO_LSI – or is it CoWoS-L? - Semiconductor Digest

On March 8, Apple held their “Peek Performance” event, introducing the all-new Mac Studio including within it the M1 Ultra processor and its unique (up to now) packaging.

www.semiconductor-digest.com

Apple’s M1 Ultra Uses TSMC’s ‘InFO_LI’ Packaging Method, Enabling Lower Cost in Mass Producing the Custom SoC

TSMC confirmed that Apple used its chip partner’s InFO_LI packaging method for the M1 Ultra and enable its UltraFusion chip-to-chip interconnect

wccftech.com

 

[Mago]

are confusing the manufacturing process used to build the package and the interface.

FYI inFO-LI is not just a manufacturing process, it's an fabric specification too. Sadly too much to comment here.

 

[leman]

Apple IP R&D is for controlling the production chain saving costs avoiding 3rd party traps (as cuda), not for being absolute selfish doing everything, you're eating so much propaganda.

Which propaganda? I mean, so far Apple has built custom CPUs, GPUs, USB controllers, Thunderbolt controllers, IOMMUs, matrix coprocessors, convolution engines, video encoders, and many other stuff. They even have their own SSD protocol (based on NVMe, but not compatible with it) and custom CPU interrupt handling! At least they use standard JEDEC RAM (at least for now), but even there the RAM packaging is fully custom.

Looking at what they have been doing until now, it certainly does seem like they want to do everything themselves. Also, they did publish patents about scaling their chips going forward. What they want to do is multiple specialised per-chip networks (optimised for different scenarios) and connect those directly across multiple chip dies (no intermediate protocol).

What you are instead telling us is to ignore all this stuff and assume that Apple will suddenly do a 180 degree flip and support the industry standard. I just don't see that happening. CXL, sure, that's important if Apple wants to build workstations. UCIe? Doesn't give them anything.

thats what UCIe does saving r&d on interfacing a bunch of IP from different vendors

Precisely. And Apple has zero interest integrating IP from different vendors.

FYI is TSMC who claim this:

Sure, these are all known things. But again you are conflating the manufacturing/packaging process and the interface. Because following your logic AMD's CPU and GPU IP is just rebranded TSMC IP since it's "5nm". UltraFusion is built using TSMCs technology. But it works because of Apple's IP.

 

[leman]

FYI inFO-LI is not just a manufacturing process, it's an fabric specification too. Sadly too much to comment here.

Ok, I was not aware of this.Do you have some materials you can point me to which discuss this in more detail?

 

[dmccloud]

Apple IP R&D is for controlling the production chain saving costs avoiding 3rd party traps (as cuda), not for being absolute selfish doing everything, you're eating so much propaganda.


Not all PCIe5 using CXL except those aimed at workstations and servers. On the other hand pcie5 IP is built around UCIe for integration convenience (aka adding someone's IP into your chips), industry may often taylor some IP to address some customers implementation but before solving it's issues with mainstream market, thats what UCIe does saving r&d on interfacing a bunch of IP from different vendors

Your first point makes no sense, as costs were a secondary concern next to building efficient systems with unheard of performance. Apple's in-house chip and SoC design teams are the ones designing these chips and the necessary integrated components, not a plethora of third parties as you continue to claim. TSMC builds the chips according to Apple's specifications, not some universal "standard".

Your sense of time is all sorts of strange here. Given that the PCIe Spec was released in 2019 and UCIe wasn't even announced until late 2022, how exactly is PCIe5 built upon something that didn't even exist when it was created?

 

[dmccloud]

Ok, I was not aware of this.Do you have some materials you can point me to which discuss this in more detail?

I just did some digging around, and while TSMC themselves reference both "InFO_PoP" and "InFO-oS" on their website, I can find nothing about "inFO-LI" via any search engine.

https://www.tsmc.com/english/dedicatedFoundry/technology/InFO

 

[theorist9]

Until apple explicit and publicly denies will to use some technology or standard, it is on the cards, not the first time Apple readies something in moreless secret.

Forgot to respond to this comment, and I have to say you are absolutely right.

For instance, Apple has not explicitly and publicly denied using the standards of the Mushroom Council. Hence their use of such standards, and Apple's involvement in mushroom production technology, remains in the cards. Everything will be revealed at WWDC.

Council Members and Regions – The Mushroom Council

Note that USDA and the Mushroom Council encourage all eligible producers, including women, minorities and individuals with disabilities to participate in the nominations and seek nomination to serve on the […]

www.mushroomcouncil.org

 

[Mago]

Everything will be revealed at WWDC.

🙏 WWDC has shut up not few mouth here.

But even after the introduction of the mp 8,1 with it's modular RAM - pcie5 approach, not few of the guys ranting here will come back insisting Apple not using X....

I have something new to comment, Apple even has on the cards an modular approach based on 32 line's pcie5 Apu modules on reworked MXP modules (that 7,1 double pcie slots for Dial GPU), each slot consisting on an m2 Ultra or Extreme with everything on board except storage , you could add UpTo 2 of these Ultra Extreme MXP modules alongside 2 or 3 pcie5 x16 slots so the Mac Pro modular could top 80 cores, and be competitive with dual RTX4090 or dual A6000 workstations and include UpTo 768gb of RAM, i know it was discussed but Apple just opted to build a more tradicional Mac Pro with m2 extreme and UpTo 16 ram slots, but I won't be surprised if said ultra MXP modular Mac Pro is the One introduced at WWDC, a thing it's safe it won't disappoint, and offer somehow regular upgrade path on the same chassis, but I still haven't my doubts.