The case of an Ultra chip using two M2 Pro chips

[leman]

I have something new to comment, Apple even has on the cards an modular approach based on 32 line's pcie5 Apu modules on reworked MXP modules (that 7,1 double pcie slots for Dial GPU), each slot consisting on an m2 Ultra or Extreme with everything on board except storage , you could add UpTo 2 of these Ultra Extreme MXP modules alongside 2 or 3 pcie5 x16 slots so the Mac Pro modular could top 80 cores, and be competitive with dual RTX4090 or dual A6000 workstations and include UpTo 768gb of RAM, i know it was discussed but Apple just opted to build a more tradicional Mac Pro with m2 extreme and UpTo 16 ram slots, but I won't be surprised if said ultra MXP modular Mac Pro is the One introduced at WWDC, a thing it's safe it won't disappoint, and offer somehow regular upgrade path on the same chassis, but I still haven't my doubts.

What you describe was something I’ve been speculating about for the last two years. This is the solution I’d ultimately like to see, although it’s not clear to me how the programming model would need to change to make this possible.

 

[Mago]

What you describe was something I’ve been speculating about for the last two years. This is the solution I’d ultimately like to see, although it’s not clear to me how the programming model would need to change to make this possible.

With CXL nothing is needed to change in API or thread processing, everything relevant is covered at Metal 3 and macOS Ventura.

 

[deconstruct60]

Ok, I was not aware of this.Do you have some materials you can point me to which discuss this in more detail?

It is Info-LSI or sometimes Info-L

TSMC’s Version of EMIB is ‘LSI’: Currently in Pre-Qualification

www.anandtech.com

It isn’t a complete fabric specification in and of itself . However , if stretch things a bit then can spin this as the PHYS layer spec between the two dies because the distance and geometry is so constrained. The send/receive thru the LSI is largely going to be bound to what the bonding process can do.

 

[deconstruct60]

I just did some digging around, and while TSMC themselves reference both "InFO_PoP" and "InFO-oS" on their website, I can find nothing about "inFO-LI" via any search engine.

https://www.tsmc.com/english/dedicatedFoundry/technology/InFO

They have tweaked the names and processes a bit but .


“… InFO-L with Multi-Die, LSI Interconnect and RDL ….”

https://www.tsmc.com/english/news-events/blog-article-20200803


also the Anandtech link in article above .

the ‘-LI’ typo is the confusion factor in the original reply text . And TSMC not keeping their 3D marketing page up to date with latest tech shipping .