Just to point out: The words "oversubscribed PCIe lanes" are being thrown around here and I'd like to point out that's complete and total BS. It's being just made up by the people using them and hold no meaning. No one can know if the lanes are "oversubscribed" unless they already know how many lanes there are in the first place - and they don't! Peroid, end of story. Apple themselves said or alluded to, the fact that there are 4 [dedicated] USB3 ports and I seriously doubt they would lie, mislead, or rip us off by delivering port-multiplied ports.
Their very history in both advertising and manufacturing should tell us this. Or can someone show me where they advertised 2, 3, or 4 ports of any kind (TB, SATA, FW, LAN, anything) and yet delivered the device with port multiplication? Have they ever used port multiplication of any kind in any of their devices at all? I suspect not, no.
So this entire line of thinking is just self promoting an unfounded opinion and in reality complete BS!
We know that it uses LGA 2011 and there are two series of processor in this category. Sandy Bridge-E and Ivy Bridge-E. There is also Haswell-E but we don't know if that will use the same socket yet. The point of bringing these up is that the PCIe controller is in the processor and we already know how many PCIe lanes each of these series of processor have available.
That answer is 40 x PCIe 3.0 lanes. Each lane has a maximum throughput of 985 MB. So if we take that and multiply it by 40 we get 39,400MB/s or in Mb terms 315,200Mb/s aka 307Gb/s
Now lets consider that both of the AMD FireGL cards are connected via PCIe Gen3 8x which they likely will be (That is the equivalent of x16 PCIe 2.0 for each card) that takes 16 PCIe Gen 3 lanes out of the system leaving 24 lanes. Looking at the PCIe SSD card used in the MacBook Air it would appear that it uses a single PCIe lane. If that is Gen 3 which it very well could be then that is 985MB/s of bandwidth. The Mac Pro is claiming slightly faster than that so it may use a 4x PCIe Gen 3 or a 4x Gen 2. Either way we are comfortably over the 1.25GB/s quoted by Apple.
So lets be conservative and say it uses 4x PCIe, that leaves 20 Lanes for Thunderbolt. That's 19,700MB/s aka 157.6Gb/s more than enough for the 120Gb/s demanded by the six Thunderbolt ports (6 x 20Gb/s = 120Gb/s) being used simultaneously. If we deduct that we are left with 37.6Gb/s of bandwidth for the USB 3.0 devices.
So lets go over those, it has 4 USB 3.0, if they follow the specification that is 5Gb/s per port. Simple math dictates we need 20Gb/s of bandwidth for those, we already had 37.6Gb/s left so now we deduct that and we are left with 17.6Gb/s of overhead bandwidth.
Now obviously that PCIe bandwidth left over won't really be left over, audio, system controllers, Dual Gigabit Ethernet, WiFi and Bluetooth will use some of it and some devices will use the slower PCIe 2.0 bus, probably the SATA drive, Bluetooth and WiFi module. But expect Bluetooth and WiFi to share the same PCIe Lanes with a bridge chip and the SSD to only use 4 PCIe lanes and in these modern systems you can run PCIe 1.1, 2.0 and 3.0 devices simultaneously and in fact devices that use the PCIe bus can dynamically clock down to PCIe 1.1 or 2.0 from PCIe 3.0. They do this to enter low power states but not only when the system is sleeping, just being idle can make the PCIe bus decrease in speed. I have an example of that on my own PCIe 3.0 system I can show you if you want with screenshots as I am running an LGA 2011 system with 40 PCIe 3.0 lanes and two PCIe 3.0 compliant graphics cards which clock down to PCIe 1.1 when the system is idle.
TL;DR So in closing. The system has more than enough bandwidth for every port it has to be fully saturated while simultaneously fully loading both graphics cards.
Well, that was nicely written - and thus I could understand it all!
Thanks for supporting the obvious assumptions with actual figures!
The variables of course make all this uncertain but I agree your outline explains the minimum probable configuration.
Very helpful!
Thanks!
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