M3 Chip Generation - Discussion Megathread

[ChrisA]

- why not announce the mini's at this same time? What's the point of delaying them? Is it purely a business decision, in the sense that different products get announced in different quarters to smooth revenue? That's my best guess.

Apple does not have unlimited engineering staff. They only have so many people who can design (say) PCBs and such. The staff rotates through different projects so updates get staggered. Manufacturing needs time to re-tool and suppliers have to be given contracts. They can't do everything for every product simultaneously. There is also a limit on the number of M3 systems they can make per month and it will take time to ramp up production

 

[name99]

If it were LPDDR5X, the memory bandwidth would be 135 GB/s for 128-bit wide or 200GB/s for 192-bit wide.

It looks like it's LPDDR5.

Fair enough, if that's the number for LPDDR5X.
Then I am totally confused about what's what around the edge of the die!

 

[deconstruct60]

Damn Apple, all M3 lineup still using LPDDR5 with reducing memory bus. M3 SoC remains same config, M3 Pro is using 192-bit memory bus. M3 Max is having two type of memory bus support, 30-core GPU is using 384-bit memory bus while 40-core GPU is using 512-bit memory bus. Damn, only Apple can do it.

Memory Density	Memory Size Per Chip x64	128-bit Memory Bus (100GB/s)	192-bit Memory Bus (150GB/s)	384-bit Memory Bus (300GB/s)	512-bit Memory Bus (400GB/S)
	Memory Chips Required	2 pcs	3 pcs	6 pcs	8 pcs
32 Gigabit	4 GB	8 GB
48 Gigabit	6 GB		18 GB	36 GB	48 GB
64 Gigabit	8 GB	16 GB			64 GB
96 Gigabit	12 GB	24 GB	36 GB
128 Gigabit	16 GB			96 GB	128 GB

Apple unveils M3, M3 Pro, and M3 Max, the most advanced chips for a personal computer

M3, M3 Pro, and M3 Max feature groundbreaking technologies that deliver dramatically increased performance and unleash new capabilities for Mac.

www.apple.com

Apple has reshaped the M3 Pro package versus the M2 Pro.

Apple unveils M2 Pro and M2 Max: next-generation chips for next-level workflows

Supercharging MacBook Pro and Mac mini, M2 Pro and M2 Max feature a more powerful CPU and GPU, up to 96GB of unified memory, and power efficiency.

www.apple.com

It seems to be a bit more square. Perhaps easier to stuff into a iPad Pro 13-14" ??? ( easier squeeze into a Mini ? ) Or just getting to lower bill-of-materials costs for "Pro" packages ( less stuff and smaller (and cheaper) die ). The "Max" and "Pro" dies don't look like the same base layout anymore either.



P.S. similar on the Max . Use different packages that use less width and different densities. The full width had before only comes if crank up the CPU/GPU higher ( hence higher BTO configuration costs , And likely larger margins). Apple seems to be squeezing even fatter margins out of these new SoCs.

 

[name99]

Fair enough, if that's the number for LPDDR5X.
Then I am totally confused about what's what around the edge of the die!

After thinking about this more, and looking at the Max case, I think we should interpret this differently.
Both the "minor" Pro AND MAX are now crippled along three dimensions, not just GPU and CPU, but also DRAM bandwidth.
The high end Max has the same 400 GB/s as before.

Obviously this is some combination of yield maximizing and market segmentation. ie if the stats are such that some non-negligible fraction of dies have either a failed CPU or failed GPU, you then define some lower-end product with specs weak enough to cover most of the partially failed dies. (Even though most of the dies you ship may have, say, only one failed GPU core, or one failed CPU core, you define the low end with four failed GPUs and two failed CPUs so that you can collect most failures in that second bucket.

What's interesting is that this suggests a non-negligible fraction of the memory PHYs also fail. Perhaps a compromise - Apple made them with smaller analog transistors (less area) but there is now this risk of failure in a way that was not important for earlier revisions?
The reason I think this must be driven by engineering realities is that it's really going off into the technical weeds. If you're selling a "cheap" M3 Pro and a "full" M3 Pro, in terms of market segmentation it's enough to just have slightly less CPU and slightly less GPU; very few people are going to say "well, I was going to buy the cheap Pro, but man, I REALLY need me that 200GB/s". It feels like this MUST be forced by yield issues, not by an attempt at further market segmentation, and Apple only mentions it because legally they more or less have to. (Not exactly, but you just know that if they DIDN'T say it, then someone would sue them claiming Apple misrepresented what they were selling, b;ah blah".)

So is the Pro designed with 256b and an expectation that we will just use 192 of them that we find working, we don't even bother looking for full 256b versions?
Meanwhile Max is designed with 512b, and we harvest the highest end ones (working 512b) and cheapen down the the 384b ones?

OR maybe the Pro's with working 256b are all headed for Vision Pro???

 

[smalm]

The Snapdragon Elite X uses int4 and Apple uses float16 so they do not compare....

But is is confusing that iPhone gets a faster ANE

I have doubts the 35 TOPS is 16bit.

Apple does not have unlimited engineering staff. They only have so many people who can design (say) PCBs and such. The staff rotates through different projects so updates get staggered.

You are realy talking about the company with a $26 billion R&D budget?

 

[Gnattu]

I have doubts the 35 TOPS is 16bit.


You are realy talking about the company with a $26 billion R&D budget?

If the 35TOPS is int8 then it means iPhones are using a newer ANE but with lower clock, sounds more reasonable but the Mac still don't get the latest ANE.

 

[Gnattu]

Apple does not have unlimited engineering staff. They only have so many people who can design (say) PCBs and such. The staff rotates through different projects so updates get staggered. Manufacturing needs time to re-tool and suppliers have to be given contracts. They can't do everything for every product simultaneously. There is also a limit on the number of M3 systems they can make per month and it will take time to ramp up production

I don't think it is staffing problem, it is that Apple is unable to source that much M3 chips for all product lines.

 

[name99]

After thinking about this more, and looking at the Max case, I think we should interpret this differently.
Both the "minor" Pro AND MAX are now crippled along three dimensions, not just GPU and CPU, but also DRAM bandwidth.
The high end Max has the same 400 GB/s as before.

Obviously this is some combination of yield maximizing and market segmentation. ie if the stats are such that some non-negligible fraction of dies have either a failed CPU or failed GPU, you then define some lower-end product with specs weak enough to cover most of the partially failed dies. (Even though most of the dies you ship may have, say, only one failed GPU core, or one failed CPU core, you define the low end with four failed GPUs and two failed CPUs so that you can collect most failures in that second bucket.

What's interesting is that this suggests a non-negligible fraction of the memory PHYs also fail. Perhaps a compromise - Apple made them with smaller analog transistors (less area) but there is now this risk of failure in a way that was not important for earlier revisions?
The reason I think this must be driven by engineering realities is that it's really going off into the technical weeds. If you're selling a "cheap" M3 Pro and a "full" M3 Pro, in terms of market segmentation it's enough to just have slightly less CPU and slightly less GPU; very few people are going to say "well, I was going to buy the cheap Pro, but man, I REALLY need me that 200GB/s". It feels like this MUST be forced by yield issues, not by an attempt at further market segmentation, and Apple only mentions it because legally they more or less have to. (Not exactly, but you just know that if they DIDN'T say it, then someone would sue them claiming Apple misrepresented what they were selling, b;ah blah".)

So is the Pro designed with 256b and an expectation that we will just use 192 of them that we find working, we don't even bother looking for full 256b versions?
Meanwhile Max is designed with 512b, and we harvest the highest end ones (working 512b) and cheapen down the the 384b ones?

OR maybe the Pro's with working 256b are all headed for Vision Pro???

Another thing to look for is POSSIBLY Apple has implemented full memory compression?
This has been suggested by academia for years, and was implemented by QC in their earlier ill-fated server chip. I believe nVidia also now do this. Some line you cannot compress, but most lines you can compress by a factor of 2. The general pattern is your also store compressed line in the last level cache and decompress on their way out from that cache.

If so, this would eliminate most of the supposed bandwidth downside of the Pro (and cut-down Max). One assumes QC is also doing the same thing in Snapdragon Elite because, why wouldn't they if they already have the tech?
This helps less for GPU in that much of what GPUs move around is already special-purpose compressed (eg via some texture compression algorithm) but will probably help with general GPGPU and neural stuff. (Although neural weights should compress well, only nVidia seems to be actually making use of this fact so far, as far as I know.)

 

[TigeRick]

Apple unveils M3, M3 Pro, and M3 Max, the most advanced chips for a personal computer

M3, M3 Pro, and M3 Max feature groundbreaking technologies that deliver dramatically increased performance and unleash new capabilities for Mac.

www.apple.com

Apple has reshaped the M3 Pro package versus the M2 Pro.

Apple unveils M2 Pro and M2 Max: next-generation chips for next-level workflows

Supercharging MacBook Pro and Mac mini, M2 Pro and M2 Max feature a more powerful CPU and GPU, up to 96GB of unified memory, and power efficiency.

www.apple.com

It seems to be a bit more square. Perhaps easier to stuff into a iPad Pro 13-14" ??? ( easier squeeze into a Mini ? ) Or just getting to lower bill-of-materials costs for "Pro" packages ( less stuff and smaller (and cheaper) die ). The "Max" and "Pro" dies don't look like the same base layout anymore either.



P.S. similar on the Max . Use different packages that use less width and different densities. The full width had before only comes if crank up the CPU/GPU higher ( hence higher BTO configuration costs , And likely larger margins). Apple seems to be squeezing even fatter margins out of these new SoCs.

Thanks for bringing this up, I have been told M3 Max's memory chips have been double stacked, thus M3 Max with 384-bit bus should have 3 chips and M3 Max with 512-bit bus should have 4 chips as shown below:-

As for M3 Pro's more square design most likely due to narrow bus and smaller die size. Is there a way to calculate die size by using above pictures??? And I don't think M3 Pro could fit in thermal power of iPad Pro

 

[deconstruct60]

View attachment 2304688
Interesting

M3 has 18 TOPS NPU for AI, less than iPhone 15 Pro 35 TOPS

Or the Snapdragon Elite X 45 TOPS

Vendors are starting to play 'fast and loose' with TOPS. The Elite X TOPS are for INT4. Decent chance Apple is playing a similar game with A17 Pro with INT8. The M3 is likely FP16 (or BP16 if they support it).
It is basically Apples-vs-Oranges frenzy.

If have a 64 bit vector then can get 4 16-bit values in there, 8 8-bit values in there , and 16 4-bit values in there. Do one vector math op on the vector (e.g., +) and that gets counted for 4 , 8 , or 16 operations. Basically you 'goose' operations count by going to lower resolution.

Now that it has become a "I can do more AI TOPS than they can" bragging contest ... it is open season on goose any way possible higher numbers so you are 'winning'.

Every TOPs benchmark reference should really come with a reference to what the data width is. It is like mixing up single and double precision float into a hodge podge of just FLOPS.

 

[deconstruct60]

Thanks for bringing this up, I have been told M3 Max's memory chips have been double stacked, thus M3 Max with 384-bit bus should have 3 chips and M3 Max with 512-bit bus should have 4 chips as shown below:-

Hmm, the system cache fronts the memory controller cluster. If drop a memory controller cluster , then would be dropping SLC also. ( wonder if that is being binned because it occasionally has problems. )

Apple's tech specs don't really reflect varying memory bandwidth numbers for the Max. ( not being accurate wouldn't be a new thing though).

View attachment 2304748

As for M3 Pro's more square design most likely due to narrow bus and smaller die size. Is there a way to calculate die size by using above pictures???

I'm not sure there is a common reference point in each of the pictures. The photograph with all three dies in framed in the same shot is probably more tractable than these individual shots with varying RAM packages and base tile.

And I don't think M3 Pro could fit in thermal power of iPad Pro

The current one stops at 13" (12.9) . If it was bigger ( 14") and a bit thicker ( more like a Windows Surface Pro) it might work. An iPad Ultra (stretching the genre at the bulky side) . IMHO, 13" is already a bit unwieldy as a simple hand held. It doesn't fit with Apple's usual "thinner is better" design modus operandi though.

Pretty decent chance somebody is going to throw an Qualcomm X Elite into a Windows Tablet at something over the 25W limit.

It could help out with just the Mini fit though.

 

[TigeRick]

Vendors are starting to play 'fast and loose' with TOPS. The Elite X TOPS are for INT4. Decent chance Apple is playing a similar game with A17 Pro with INT8. The M3 is likely FP16 (or BP16 if they support it).
It is basically Apples-vs-Oranges frenzy.

If have a 64 bit vector then can get 4 16-bit values in there, 8 8-bit values in there , and 16 4-bit values in there. Do one vector math op on the vector (e.g., +) and that gets counted for 4 , 8 , or 16 operations. Basically you 'goose' operations count by going to lower resolution.

Now that it has become a "I can do more AI TOPS than they can" bragging contest ... it is open season on goose any way possible higher numbers so you are 'winning'.

Every TOPs benchmark reference should really come with a reference to what the data width is. It is like mixing up single and double precision float into a hodge podge of just FLOPS.

Yeah, it is confusing and Apple described performance of A17 Pro as up to 35 TOPS. Based on GeekBench ML Benchmark, I am not so sure about the numbers claimed by Apple, do you?

 

[Chuckeee]

Does anyone have something the compares the physical size of the baseline M1, M2 and M3 chips. A comparison of physical dies would be useful too. Thank you 🙏

 

[smalm]

If the 35TOPS is int8 then it means iPhones are using a newer ANE but with lower clock, sounds more reasonable but the Mac still don't get the latest ANE.

I think Apple started optimizing the NPU in the A17 for its usecase smartphone/camera.

 

[Chancha]

Apple's tech specs don't really reflect varying memory bandwidth numbers for the Max. ( not being accurate wouldn't be a new thing though).

I found these bits in the spec sheet, it is listed among the SoC part not the memory part:

Apple M3 Max chip
Configurable to:
M3 Max with 14-core CPU and 30-core GPU (300GB/s memory bandwidth)
or
M3 Max with 16-core CPU and 40-core GPU (400GB/s memory bandwidth)

 

[deconstruct60]

Actually, these new chips come with a new 6-core cluster design. Even the 4-core M3 follows a similar pattern. You can see big square-like structures in all three SoCs, with one corner without CPU cores. Instead, there is an AMX coprocessor in that corner. The AMX coprocessor is smaller than 2 P-cores, so the square still appears to be missing one corner. The 4-core M3 seems to have 2 more cores removed from the other 2 corners, as annotated in the graph. The red square represents the approximate cluster, the blue square represents the AMX coprocessor, and the yellow square represents the 'missing cores' in M3

View attachment 2304680

What you are labeling in blue I think are E-cores. At least on the M3 Pro and M3. Go back to post 1437 for P cores.

https://forums.macrumors.com/threads/m3-chip-generation-speculation-megathread.2393667/post-32679500

[Although I would bracket those vertical as opposed to horiztonal in that picture. The bottom horizontal I think is grouping two different cluster groups. ]


And I don't think it is a cluster of 6 Cores. Looks more like a mix of 4 P and 2 P clusters on the Pro and Max. Same with the E-cores 4 + 2 for the Pro and the Max has more than 4 ( and just harvesting the 4 core cluster that works 'better'. Perhaps a small yield management thing. More bulk on the Max die so can provision some 'overkill'. The space to too small for any of the other major subsystems so just use it. I think Apple is at fringe of aggregate bandwidth so not doing both active. )

 

[leman]

That one has to wait for benchmark. Apple know there is going to have performance loss due to reduction of memory BW. That's why they create dynamic caching, let's wait and see

Oh they are not related. Dynamic caching is more useful for low memory capacity not bandwidth.
And 150G/s is already more than what a 6-core P cluster can pull, probably the GPU performance is more impacted but it is still to be seen.

The M3 Pro is actually a downgrade because transistor count is less than M2 Pro. Apple just realized that compute people is not buying Max variants.

Guys, please stop spreading FUD about new features. Dynamic Caching has nothing to do with RAM. It’s about allocating on-chip resources to shaders.

 

[leman]

I'm starting to think that M3 might in fact be a different architecture than A17 Pro...

Different NPU, GPU feature not in A17 Pro, "only 30%" faster than M1 in CPU which would yield a GB6 ST score of only around 3,000. That seems off.

It’s the same architecture, which is very clear from the slides. Come on.

 

[jeanlain]

Based on Apple's marketing charts, the M3 P-core seems only marginally faster than the A17 Pro's.

 

[Confused-User]

The CPU numbers are confusing me.
11 core Pro
14 core Studio
is there anywhere a page with the details, P vs. E core numbers ?

Yes, Apple's tech specs.

Price hike for MacBook Pro in

Wonder how it will benchmark against the M2 Pro. Expect very little on MT and the GPU update is very dependent on the use of new capabilities.

In what world is this a price hike? I could wish for a bit more value from Apple, but this isn't a price hike unless you can prove that performance has declined (it hasn't; possibly the 11-core Pro will be a minimal improvement for CPU, but still better at other stuff).

Even more, it seems that have more physically different chips. Before it was just Pro and Max, with Pro being a chopped down Max die. Now it looks like we have a Pro (a distinct layout), and two Maxes (shared layout and chopped die). Is N3 so expensive that designing a sets rate die plus additional overhead ends up cheaper?

I noticed this too, very good question. I suspect it's more about optimizing die area and performance.

The chose to cut M3 out of M3 Pro this year, instead of cutting M3 Pro from M3 Max. The resulting CPU performance is only 20% faster than M1 Pro, so about the same as M2 Pro. It is laughable at this point.

I think you'll be eating your words as soon as benchmarks come out.

Also I don't think any die is a chopped version of another die. Though clearly they all share a lot of common sections.

 

[MayaUser]

So the M3 Ultra will have 24 P cores and 80 gpu cores with up to 256gb Ram?!

 

[Confused-User]

Based on Apple's marketing charts, the M3 P-core seems only marginally faster than the A17 Pro's.

I couldn't find actual speed in GHz for any of these chips on Apple's pages. It's possible the base M3 is running at the same speed as the A17, but just doesn't throttle as much with its better thermal envelope, while the Pro/Max are clocked higher. Hard to tell from what I've seen so far.

 

[Confused-User]

So the M3 Ultra will have 32P cores and 80 gpu cores with up to 256gb Ram?!

24 P cores. The Max is 12P + 4E. That assumes they do an Ultra for the M3 like they did for the M2 and M1. And of course we could conceivably see a quad layout with 48 P cores, 512GB RAM, and 160 GPU cores. That would be a fairly serious machine.

 

[MayaUser]

24 P cores. The Max is 12P + 4E. That assumes they do an Ultra for the M3 like they did for the M2 and M1. And of course we could conceivably see a quad layout with 48 P cores, 512GB RAM, and 160 GPU cores. That would be a fairly serious machine.

Sorry, yes, 24P. You really think based on M3 family that Apple will go for the Ultra with 48P 512gb Ram and 160 gpu cores on the Ultra? or you are saying maybe this will be for the "Extreme M3"

 

[senttoschool]

It’s the same architecture, which is very clear from the slides. Come on.

Which slides in particular?