M1 Max to M3 Max are all single-die chips. Why would Apple move from monolithic to fusion at the Max tier?
Not to answer this (sensible, rhetorical) question but to steer this thread back to something vaguely technical, and based on chiplets.
We have been brainwashed by AMD and Intel into seeing chiplets as essentially a technology of extending logic. Why limit yourself in that way? If you think outside the box, what ELSE could you do with chiplets?
Enter
https://patents.google.com/patent/US12068324B2
This is an astonishing patent that is so far out the box I've no idea if it will ever become reality.
The idea is that below your main SoC you attach a secondary chip which is kinda like a dramatically simplified FPGA. All it has on it is capacitors and switches on one sort or another. A (LARGE) number of power pins, from all the different IP blocks on the SOC connect to different capacitors on the lower chip.
You then configure this lower "passive FPGA" so that the different capacitors are isolated as appropriate, each right-sized for the expected switching demands of the device. You can even dynamically resize the per-IP-block capacitance if you see that the workload has switched from CPU-intensive to GPU-intensive. It's absolutely insane, and absolutely genius! And the best part - you can build this passive chiplet on a trailing fab, nothing about it demands N3.
Will it ever ship? Who knows? Apple has been polishing the idea since 2013, which on the one hand means it ain't shipped yet (as far as I know) so maybe there is some fundamental problem (like the ill-fated power pad).
On the other hand, maybe it's JUST a cost thing; at some point the costs vs the payoff will work out and we start to see it?
The latest version (I did a quick compare of the 2013 vs 2021 version) seems to suggest that this secondary chiplet under the SoC, because it doesn't need to be that large to hold the desired capacitance, especially w/ deep trench capacitors, could also host "memory" (which, realistically I interpret to mean MRAM or ReRAM, something that can also be fabbed in a trailing process).
And maybe this additional idea will kick the concept into viability?