Ventura has a few improvements shown in the AllRez outputs compared to the outputs from Monterey.
While you're playing with other OSs, I would try Catalina to see if DSC is enabled by default for any of the adapters.
Ventura changes for q80t
It seems you are using different settings for the q80t. VRR is removed in the latest EDID. I guess this doesn't matter if the adapter doesn't allow VRR. There's also some new modes in the EDID:
Code:
VIC 7: 1440x480i 59.940060 Hz 16:9 15.734 kHz 27.000000 MHz
VIC 22: 1440x576i 50.000000 Hz 16:9 15.625 kHz 27.000000 MHz
VIC 3: 720x480 59.940060 Hz 16:9 31.469 kHz 27.000000 MHz
VIC 18: 720x576 50.000000 Hz 16:9 31.250 kHz 27.000000 MHz
Ventura adds 4K100 and 4K120 modes (both HDMI timings with 1188 MHz) which were missing in Monterey. Associated scaled modes are also added except where a non-scaled mode of the same refresh rate exists. Actually, it's weirder than that. For example, 1440p120 scaled mode is added for HDR but the corresponding SDR mode is not a scaled mode. For your built-in display, no new modes are added.
Ventura does not add 8K scaled modes as Monterey does for either display. I guess they're redundant since the display is only 4K (or less than 4K in the case of the built-in display) but one might prefer the anti-aliasing that using 8K provides - or the ability to take 8K HiDPI screenshots.
Ventura fixes a bug in the maxBandwidth calculation of IOFBTimingRange. The corrected bandwidth is 25.79 Gbps which is the HBR3 max of 25.92 Gbps with allowance for some small amount of overhead I guess (but smaller than I would expect). It increases the dscMaxSlicePerLine from 4 to 8. It sets the dsc bpp range to 0 instead of 6..63. I'm not sure why they did that. Maybe because Apple always uses a default of 12bpp? Unless that's been changed...
For the built-in display, it says the maxBandwidth is 100.8 Gbps. I don't understand this. The DPCD only reports 4 lanes of HBR2 which is 17.28 Gbps. For the built-in display, the dsc bpp range is still 6..63. The built-in display doesn't support DSC. Actually, the IOFBTimingRange for all the IOFramebuffers that don't have a display connected are the same as that of the built-in display. Maybe 100.8 Gbps is the total max bandwidth of all displays?
One thing interesting about Synaptics adapters is that they have some kind of console text output happening in the Branch Device-Specific section of the DPCD. You can see this better with the firmware update app you can get from the Microsoft Store for Windows (search for Synaptics). I should see if I can get the full console text log in AllRez...
There's a strange bug in the DPCD for the built-in display reported in the AGDCDiagnose output included the AllRez output for the q80t. All the bytes for Reg: 000080 to Reg: 00008f are 00 but it reports something different for Reg: 000082. The same AGDCDiagnose output is missing DPCD for the adapter/external display even though AllRez was able to report the DPCD.
The AGDCDiagnose output has some minor updates in Ventura.
Code:
AGDC Power Mode 0 (Default Power)
Workload Policy 8 (Multi-Display)
Reported Link Rate HBR2 - 5400 Mbps/lane
Reported Link Spread YES
Dongle Type None (0)
DPCD version 0x12
Sink Count 1
Supports VRR NO
Link Rate (Mbps/lane) 5400 (max:5400)
It says your builtin display is outputting 10bpc in Ventura, but the framebuffer is only 8bpc. Use the SwitchResX menu to change the framebuffer depth to billions of colors.
My parsing of GTRACEDATASTREAM for Ventura is missing all the things that are specific to Monterey. I would have to update it for every version of AGDCDiagnose. Well, I don't think GTRACEDATASTREAM has very useful info anyway...
Ventura changes for r648
- Adds 4K120 4:2:0 10bpc 1188MHz (17.82 Gbps) mode and associated scaled modes.
- No 4K110 mode is added in this case, unlike the q80t.
- 2560x1080@100Hz 4:4:4 10bpc is removed.
- 2560x1440@120Hz 4:4:4 497.75MHz is upgraded from 8bpc to 10bpc. This means that this mode can also do HDR now.
- 8K scaled mode removed (also for built-in display)
- Recognizes display as 7680x4320 instead of 4096x2160.
- Sets maxBandwidth in IOFBTimingRange is calculated as 25.79 Gbps (only for r648, other IOFramebuffers now have 100.8 Gbps)
- Sets max slices per line to 8 instead of 4
- Sets dsc bpp range to 0 instead of 6..63 (only for r648, other IOFramebuffers still have 6..63)
AllRez got an error trying to read DisplayPort DPCD for the display. Maybe I should add a retry.
AGDCDiagnose parses more registers:
Code:
Built-in display:
- Reg: 002210: 00 : FEATURE_ENUMERATION_LIST: VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED 0
r648 display:
- Reg: 002210: 08 : FEATURE_ENUMERATION_LIST: VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED 1
- Reg: 000082: 00 : DETAILED_CAP_INFO_AVAILABLE: MAXIMUM_BPC: 8 bpc, MAXIMUM_LINK_BW: Not Suppported, SOURCE_CONTROL_MODE: Not Supported, CONCURRENT_LINK_BRINGUP: Not Supported
- Reg: 003036: 7f : HDMI_ENCODED_LINK_BW: 0x7f HDMI_LINK_CONFIG: FRL mode, HDMI_ENCODED_LINK_BW: 09/18/24/32/40/48 Gbps
- Reg: 00303b: 00 : HDMI_TX_LINK_STATUS: HDMI_TX_LINK_ACTIVE_STATUS 0, HDMI_TX_READY_STATUS 0
- Reg: 00305a: 00 : HDMI_FRL_LINK_CONTROL_1: FRL_MAXIMUM_ENCODED_LINK_BW_ENABLE Not Suppported, SOURCE_CONTROL 0, CONCURRENT_BRINGUP 0, FRL_MODE_ENABLE 0, FRL_HPD_READY_STATUS 0, HDMI_LINK_ENABLE 0
- Reg: 00305b: 00 : HDMI_FRL_LINK_CONTROL_2: FRL_ENCODED_LINK_BW_MASK Gbps, FRL_LINKTRAIN_CONTROL Extended
AGDC removes parsing of some registers:
Code:
r648 display:
- Reg: 000080: 08 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 1, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0
- Reg: 000084: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0
- Reg: 000088: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0
- Reg: 00008c: 00 : DETAILED_CAP_INFO_AVAILABLE: DWN_STRM_PORTX_CAP: [0] DisplayPort, DWN_STRM_PORTX_HPD: 0, NON_EDID_DWN_STRM_PORTX_ATTRIBUTE: 0
I think parsing of Reg: 000082 is broken.
Code:
Built-in display:
- Reg: 000082: 00 : DETAILED_CAP_INFO_AVAILABLE: MAXIMUM_BPC: 8 bpc, MAXIMUM_LINK_BW: Not Suppported, SOURCE_CONTROL_MODE: Not Supported, CONCURRENT_LINK_BRINGUP: Not Supported
I believe AllRez parses those registers correctly already (I don't have DisplayPort 1.4 spec, I'm just going by what's in the Linux source code).
AllRez DPCD output is cleaner because it usually doesn't show registers that are zero unless zero has a meaning other than "does not exist".