I think the video was a bit OTT in its shock and horror - its totally standard operating practice for PCIe PCs to have more PCIe slots than they could possibly supply
independent PCIe lanes from the CPU to every pin. PCIe Mac Pros - even the 2019 - have
always used a PCIe switch, and supplied the "Expansion slot utility" (
https://support.apple.com/en-gb/HT210104) prioritise which slots get dedicated lanes vs. sharing bandwidth.
The Xeon-W in the 2019 MP had 64 lanes of PCIe from the processor - some of that had to go to storage, networking etc. and 16 lanes were always needed for a GPU in slot 1. That left 32 lanes shared betwee
You can work out from the picture of the utility in the link above that 16 lanes went to the first slot (which would
always be a GPU and typically get 16 direct lines from the processor) leaving two "banks" of 16 lanes each to be shared between the remaining slots - well short of the 76 lanes needed to give full, unshared bandwidth to each slot.
So, looks like the 2023 has 16 lanes of PCIe
4 shared between two x16 and four x8 slots - may be a disappointment if you were dreaming of full bandwidth to all those slots, but a lot better than the 4 lanes worth of PCIe
3 (plus lag) shared between one x16 and two x8 that you'd get with, say, an Echo III external PCIe box.
However... yeah, that's really not a good return on your $3000 premium and really only equivalent to what you'd get on a bog standard tower PC, let alone a threadripper box.
The alternative being that the magic fairies have visited and created 32+ lanes of PCIe4 out of nowhere. The video (or rather the brief glimpse of the PCIe lane allocation) provides the most plausible explanation so far - its the unused storage interface from the second M2 Max die.
