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Tsialex, can you PM the details to me of your ROM reconstruction services? My 2009 Mac Pro upgraded with Hexacore Zeons has about 25000 free space left. Looks like time to do a replacement.

Thanks for your help.
Sure, I’ll send it shortly. Btw, sockets are only really useful for firmware developers, do not install one if you are not a firmware developer or a beta tester, constant source of bad contacts.
 
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how to rebuild the ROM?
It's a service. You send your current BootROM image dump, pictures of the MLB and ESN labels and the SystemInformation report. Your current BootROM image dump is validated against the data from the labels, all checksums verified, all modules checked if are the current versions, then everything is upgraded, NVRAM volume cleaned, BootROM reconstructed and tested. After all that, a never booted BootROM image for your Mac Pro is sent.
 
I just had tsialex redo my early 2009 Mac Pro ROM. It works like a champ and replaced the hacked firmware update that I did from 4,1 to 5,1. I have another Mac Pro I'm going to get done.

WORTH THE PRICE FOR HIS AWESOME WORK!

And YES, I am yelling!
Wise decision! 👍
 
Ok a bit embarrassed to turn this into a “praise the awesome dude” thread.
but, that’s just it: without this service, and Alex’s competence and dedication, many fantastic cMP would go to landfill. I for one cannot be more grateful. Thank you!
 
Hi I am in the Boot Rom danger zone with at least one of my Macs. Help is much appreciated. 4.1-5.1 '09 flashed.
 
Ok a bit embarrassed to turn this into a “praise the awesome dude” thread.
but, that’s just it: without this service, and Alex’s competence and dedication, many fantastic cMP would go to landfill. I for one cannot be more grateful. Thank you!
Thx!

Yep, your mid-2010 BootROM image was in a very poor shape, besides that, the early-2009 case with mid-2010 backplane/CPU tray combo was a weird surprise :p

Hi I am in the Boot Rom danger zone with at least one of my Macs. Help is much appreciated. 4.1-5.1 '09 flashed.
PM sent.
 
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Hi Alex,
I'm obtained Mac Pro 4,1 with defective CPU Tray. Purchase "new" working CPU Tray and Mac "wake up". I was surprised when saw in System Information that Mac Pro is now 5,1. Following recommendation in forum I first install High Sierra to reach MP51.0089.B00 and after that install Mojave to reach 144.0.0.0.0 . Everything was smooth until I read #4,917 and found that my NVRAM has only 38272 free space (Tray with only 1 CPU X5675 and 4x16 GB memory). I try deep NVRAM reset, but after that I have now free 25169 and second VSS store is empty. Also in first VSS store has a lot of "Invalid" lines. I prepare to order new MXIC MX25L3206E and replace on main board.
I read your first post in this tread, but for me is not clear:
1. what case should have MXIC MX25L3206E - I asume 8SOP - please confirm
2. If I program new chip with generic MP51.fd firmware who can help me with BootROM reconstruction?
3. Is it possible to program new MX25L3206E with programer before soldering to main board with all needed information so when power up Mac everything to be in place?
Please, send me PM for your reconstruction service.
 
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Hi!

I'm obtained Mac Pro 4,1 with defective CPU Tray. Purchase "new" working CPU Tray and Mac "wake up". I was surprised when saw in System Information that Mac Pro is now 5,1.

Normal, most early-2009s obtained from individuals are by now cross-flashed to the MP51 EFI.

Following recommendation in forum I first install High Sierra to reach MP51.0089.B00 and after that install Mojave to reach 144.0.0.0.0 . Everything was smooth until I read #4,917 and found that my NVRAM has only 38272 free space (Tray with only 1 CPU X5675 and 4x16 GB memory). I try deep NVRAM reset, but after that I have now free 25169 and second VSS store is empty. Also in first VSS store has a lot of "Invalid" lines. I prepare to order new MXIC MX25L3206E and replace on main board.

Read invalid as a superseded entry marked for reclamation, the invalid term while correct scares a lot. ;) A long running Mac Pro will have lot's of entries marked for reclamation, this is expected. What is not expected is to become worse after a NVRAM reset…

The problem with early-2009s is that from factory there are only one VSS store and a working FTW one, while mid-2010s/mid-2012s have two VSS stores and just a placeholder for the FTW store, these differences when cross-flashed to MP51 EFI in the long run will corrupt the NVRAM volume, it's the easiest Mac Pro to brick.

I read your first post in this tread, but for me is not clear:
1. what case should have MXIC MX25L3206E - I asume 8SOP - please confirm

The backplane U8900 chip, the BootROM SPI flash memory, is a 8-pin 200mil SOP.

2. If I program new chip with generic MP51.fd firmware who can help me with BootROM reconstruction?

You are talking to the right person. :cool:

3. Is it possible to program new MX25L3206E with programer before soldering to main board with all needed information so when power up Mac everything to be in place?

Yes.

Please, send me PM for your reconstruction service.

Ok!
 
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something I’m wondering here is if a reconstructed BootROM would allow one to upgrade their firmware without a Mojave whitelisted Metal-capable graphics card.
 
Good to know. I bought a GT710 months ago just to do that firmware upgrade, and I paid probably as much as I did for the firmware reconstruction in the first place (which itself was like $20-30 less than I paid for the non-whitelisted RX 580 I am using now).

I’m already good on my firmware, but I think maybe this should be made clearer in the first post or something? If nothing else I would have saved a lot of time and money 6 months ago if I realized this then :)
 
Good to know. I bought a GT710 months ago just to do that firmware upgrade, and I paid probably as much as I did for the firmware reconstruction in the first place (which itself was like $20-30 less than I paid for the non-whitelisted RX 580 I am using now).

I’m already good on my firmware, but I think maybe this should be made clearer in the first post or something? If nothing else I would have saved a lot of time and money 6 months ago if I realized this then :)

Apple did it this way intentionally - if you want to run post High Sierra macOS releases, you are required to have a METAL supported GPU and this disclaimer would be only useful useful for people with non-METAL GPUs and running High Sierra or older macOS releases that want to have the most updated EFI.
 
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Hi tsialex, curious, is the 3,1 bootrom chip a similar procedure? I have an old bootrom backup I did several years ago to add nvme support before installing Mojave. I was wondering if I could flash the old rom to a new chip and solder it. (I have a programmer) I expect my bootrom chip is probably getting near it's EOL. More of a precaution, honestly. Is the chip in the same place on the 3,1? I remember you saying something about the 3,1 having the bios spread across two chips or something similar?
 
To my knowledge, Mac Pro 1.1 to 3.1 don't use common SPI-chips. You need very special programming hardware.

Only way flashing is with RomTool, so changing to a blank chip isn't possible easy.
 
Hi tsialex, curious, is the 3,1 bootrom chip a similar procedure?

Unfortunately not, MacPro3,1 BootROM is a FWB (TSOP-32pins) flash memory. It's a lot more expensive and difficult to source flash memory and a lot more complicated to de-solder/solder.

Programming also require a real flash memory programmer, like a TL-866II + TSOP adapter.

I have an old bootrom backup I did several years ago to add nvme support before installing Mojave. I was wondering if I could flash the old rom to a new chip and solder it. (I have a programmer) I expect my bootrom chip is probably getting near it's EOL.

Never saw a MacPro3,1 bricked because flash memory failure, so, I doubt it. The FWB flash memory was the best flash memory for the technology of the time, while MacPro4,1/5,1 moved to a first generation SPI flash memory that didn't stood the passage of the time.

More of a precaution, honestly. Is the chip in the same place on the 3,1?

No, it's right below the AirPort Extreme/BT module.

I remember you saying something about the 3,1 having the bios spread across two chips or something similar?

Yes, there is also a small SPI nearby for the NVRAM.
 
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Never saw a MacPro3,1 bricked because flash memory failure, so, I doubt it. The FWB flash memory was the best for the technology of the time, while MacPro4,1/5,1 used a first generation SPI flash memory that didn't stood the passage of the time.
Literally just a question, but my understanding up to now was that it was more that the firmware techniques for writing the flash in those generation MacPros is not so great, e.g. not a great approach to wear levelling, etc.? (Also possibly a slightly broken approach to write caching.) And that the chips used are more or less equivalent to more modern NVRAM chips? Interested - and happy - to receive corrections and clarifications to my current level of understanding!
 
Literally just a question, but my understanding up to now was that it was more that the firmware techniques for writing the flash in those generation MacPros is not so great, e.g. not a great approach to wear levelling, etc.?

No hardware wear leveling whatsoever with the flash memories used with early-2009 to mid-2012, besides the VSS store circular log.

MacPro6,1 have different mitigations, like multiple stores in rotation and different stores for MemoryConfig entries, but also no hardware wear leveling. MacPro7,1 have a "fake" NVRAM, the real one is inside the T2 Security Chip.

And that the chips used are more or less equivalent to more modern NVRAM chips?

Nope, nothing like NANDs, no management at all. If a sector fails, you have a brick.

BTW, there is no modern NVRAM chips like Dallas DS series. Dedicated NVRAM is long gone relic, no Macs post 2007/2008 have NVRAM chips at all - the most recent one that I remember right now that have a dedicated classic NVRAM (SRAM + battery) was MacBook2,1.

Interested - and happy - to receive corrections and clarifications to my current level of understanding!

You could/should read the SST and MXIC datasheets for the flash memories used and the NatSemi paper about this gen of SPI flash memories to better understand how the memories work and to know more bout details like life expectancy/contiguous writes and etc. I've linked it al on the thread in the past - it's very worrisome to learn that the flash memories were never expected to be reliable after all these years when used as a NVRAM (contiguous writes).
 
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@tsialex is it possible to flash a Bootrom that deacrivstes Hyperthreading in Bootcamp Windows also?

Couldn‘t find a way, and I am still looking. I need single core performance more than Threads :)
 
@tsialex is it possible to flash a Bootrom that deacrivstes Hyperthreading in Bootcamp Windows also?

Couldn‘t find a way, and I am still looking. I need single core performance more than Threads :)
Hyper threading disable NVRAM setting is only for macOS. I don't know any way to disable it via the NVRAM that works with Windows.
 
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