E5 is a 64 bit cpu period, if not why it's not marketed as 256bit cpu? Because is not an 256bit architecture.Traditionally, the "bitness" of a CPU refers to the size of its native memory address pointers. For obvious reasons, the integer register size is usually the same size as the pointer size - pointer arithmetic is very common.
Mago is confusing the width of the memory bus with the size of the pointers. (Not surprising, Mago confuses a lot of things with other unrelated things.)
The E5 is fundamentally a 256-bit CPU. Although memory pointers are 64-bit (no need for more), the four channel memory moves 256-bit of RAM per operation. A full (with v3/v4) suite of instructions operate on 256-bit registers.
The E5 is a processor with 256-bit registers, 256-bit memory paths and instructions that operate on 256-bits in single instructions. Its native virtual address pointers are 64 bit.
Of course Intel calls it a 64-bit processor. Intel is also quick to point out the SIMD instructions and wide memory paths.
64 bits (or bitness in your words indeed incorrect) is on how the cpu is intended to interact with apps and OS and it's the word size it transfers on each instruction. AVX extensions are intended for vector compute ( more similar to math specific instructions than general purpose 64 bit instruction words) not applicable To define it as 256/512 bit cpu, neither promotes the Xeon to the 128/256/512bit cpu league, it's more like an intermediate like when Intel launched the 80286 to overcome the address limitations on the 8086 (1MB) they include the feature to address 16MB of ram the '286 still a 16 bit cpu not a 24/32 bit cpu (it comes later with' 386), same was on the 8088/8086 the '86 is an 16bit cpu and the' 88 is an 16bit cpu on 8 bit data bus.
What defined 32bit, when whole the instructions and buses (data) both handle 32bit words then Intel released the 80386 which actually doesn't have 32bit memory bus address capability (only logic support for 32bit address while actually the cpu only has 24 or 26 lines to address memory or upto 64MB).
Another person stands that ia-64 refers to itanium 64 bit architecture, that's right, x68-64 (same as amd64 emt64 all indeed the same thing a x86 instructions set for 64bit cpu) . refers to Intel's x86 64 bit architecture, and itanium was an new architecture launched by Intel and HP not compatible with x86 software and intended to replace ia32 (32 bit x86) but amd take over with an solution more convenient (from marketing perspective) with amd64 capable to run x86 binaries on 64bit systems, these times rebuild applications for another architecture was tricky not as today when is almost trivial.
I don't know Aiden's traditions but on IT 64 bit cpu is related to the instruction set and word width (8/16/32/64) has nothing to do with the actual interface, just look at Apple's A7 cpu, its an 64bit cpu but only has a 31 bit memory address bus (only can address 2GB of ram)...
So 64Bits class do not define memory address buss, as the Xeon e5 can handle certain instructions that uses 256 bits of simultaneous data neither it has the capability to address 2^256 memory bits, the same it actually have 4 channel memory bus, which means can address 72x4 bits of data it doesnt disqualifies it as a 64 bit CPU, since this is the interface to the CPU L2 cache (from L2 and L1 it uses 64 bit or more memory interface)
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